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Low-power SAR ADC design: Overview and survey of state-of-the-art techniques
This paper presents an overview for low-power successive approximation register (SAR)
analog-to-digital converters (ADCs). It covers the operation principle, error analysis, and …
analog-to-digital converters (ADCs). It covers the operation principle, error analysis, and …
Halide perovskite memristors as flexible and reconfigurable physical unclonable functions
Abstract Physical Unclonable Functions (PUFs) address the inherent limitations of
conventional hardware security solutions in edge-computing devices. Despite impressive …
conventional hardware security solutions in edge-computing devices. Despite impressive …
Hardware designs for security in ultra-low-power IoT systems: An overview and survey
The development of ultra-low-power (ULP) electronic devices has opened up opportunities
for disruptive systems like the Internet of Things (IoT). The main concern is the security and …
for disruptive systems like the Internet of Things (IoT). The main concern is the security and …
Concealable physically unclonable function chip with a memristor array
A physically unclonable function (PUF) is a creditable and lightweight solution to the mistrust
in billions of Internet of Things devices. Because of this remarkable importance, PUF need to …
in billions of Internet of Things devices. Because of this remarkable importance, PUF need to …
An all-digital edge racing true random number generator robust against PVT variations
This paper presents an all-digital true random number generator (TRNG) harvesting entropy
from the collapse of two edges injected into one even-stage ring, fabricated in 40 and 180 …
from the collapse of two edges injected into one even-stage ring, fabricated in 40 and 180 …
Trends in hardware security: From basics to ASICs
M Alioto - IEEE Solid-State Circuits Magazine, 2019 - ieeexplore.ieee.org
This article presents an excerpt of the tutorial on hardware security delivered at the 2019
IEEE International Solid-State Circuits Conference and an introduction to a performance …
IEEE International Solid-State Circuits Conference and an introduction to a performance …
A 4-fJ/b delay-hardened physically unclonable function circuit with selective bit destabilization in 14-nm trigate CMOS
This paper describes a full-entropy 128-b key generation platform based on a 1024-b hybrid
physically unclonable function (PUF) array, fabricated in 14-nm trigate high-k/metal-gate …
physically unclonable function (PUF) array, fabricated in 14-nm trigate high-k/metal-gate …
Design guidelines and feedback structure of ring oscillator PUF for performance improvement
Z Huang, J Bian, Y Lin, H Liang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
The physical unclonable function (PUF) is a hardware security primitive that is used to
generate secret keys or identity authentication for chips using random manufacturing …
generate secret keys or identity authentication for chips using random manufacturing …
An all-digital unified physically unclonable function and true random number generator featuring self-calibrating hierarchical Von Neumann extraction in 14-nm tri-gate …
This paper describes a unified static/dynamic entropy generator based on a 512-b common
entropy source (ES) array fabricated in 14-nm tri-gate CMOS with reconfigurable and …
entropy source (ES) array fabricated in 14-nm tri-gate CMOS with reconfigurable and …
8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability
This work presents a PUF cell based on a simple sub-threshold 2-transistor (2T) amplifier
implemented in 180nm CMOS featuring:(1) a small 553F2 PUF cell, integrated in an array …
implemented in 180nm CMOS featuring:(1) a small 553F2 PUF cell, integrated in an array …