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Sigma-delta modulators: Tutorial overview, design guide, and state-of-the-art survey
This paper presents a tutorial overview of ΣΔ modulators, their operating principles and
architectures, circuit errors and models, design methods, and practical issues. A review of …
architectures, circuit errors and models, design methods, and practical issues. A review of …
[كتاب][B] Continuous-time sigma-delta A/D conversion: fundamentals, performance limits and robust implementations
F Gerfers, M Ortmanns - 2006 - books.google.com
Sigma-delta A/D converters are a key building block in wireless and multimedia
applications. This comprehensive book deals with all relevant aspects arising during the …
applications. This comprehensive book deals with all relevant aspects arising during the …
Wideband and low-power delta-sigma ADCs: State of the art, trends and implementation examples
Continuous-time Delta-Sigma (ΔΣ) ADCs have obtained a dominant position for the
digitization in wireless receivers. With steadily improved theoretical understanding …
digitization in wireless receivers. With steadily improved theoretical understanding …
A continuous-time/spl Sigma//spl Delta/Modulator with reduced sensitivity to clock jitter through SCR feedback
This paper presents a means to overcome the high sensitivity of continuous-time sigma-
delta (/spl Sigma//spl Delta/) modulators to clock jitter by using a modified switched-capacitor …
delta (/spl Sigma//spl Delta/) modulators to clock jitter by using a modified switched-capacitor …
A comparative study on excess-loop-delay compensation techniques for continuous-time sigma–delta modulators
Excess loop delay (ELD) is well known for its detrimental effect on the performance and
stability of continuous-time sigma-delta modulators. A detailed analysis on the most recently …
stability of continuous-time sigma-delta modulators. A detailed analysis on the most recently …
An 8.5 mW Continuous-Time Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR
This paper presents a third order, single-loop, continuous-time ΔΣ modulator with an internal
4-bit quantizer. The modulator is sampled at 500 MHz, and features an oversampling ratio of …
4-bit quantizer. The modulator is sampled at 500 MHz, and features an oversampling ratio of …
A 900-MHz direct delta-sigma receiver in 65-nm CMOS
K Koli, S Kallioinen, J Jussila, P Sivonen… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
Direct delta-sigma receiver architecture is introduced for wireless communication systems,
such as LTE or WiMax. Architecture is based on direct downconversion, delta-sigma …
such as LTE or WiMax. Architecture is based on direct downconversion, delta-sigma …
Systematic design centering of continuous time oversampling converters
We address the practical problem of determining the loop filter component values in a single-
loop continuous-time delta sigma modulator. Conventional techniques to design center the …
loop continuous-time delta sigma modulator. Conventional techniques to design center the …
A GPU-accelerated web-based synthesis tool for CT sigma-delta modulators
This paper presents a design environment for continuous-time sigma-delta analog-to-digital
converters for automatic coefficient scaling using a genetic algorithm. In order to provide an …
converters for automatic coefficient scaling using a genetic algorithm. In order to provide an …
An ELDC-free 4th-order CT SDM facilitated by 2nd-order NS CT-SAR and AC-coupled negative-R
This article presents an excess loop delay compensation (ELDC) free 20 MHz bandwidth
(BW) fourth-order continuous-time sigma-delta modulator (CT SDM) facilitated by a noise …
(BW) fourth-order continuous-time sigma-delta modulator (CT SDM) facilitated by a noise …