Modern computing systems employ significant heterogeneity and specialization to meet
performance targets at manageable power. However, memory latency bottlenecks remain …

We present Decoupled Vector Runahead (DVR), an in-core prefetching technique,
executing separately to the main application thread, that exploits massive amounts of …

Runahead execution improves processor performance by accurately prefetching long-
latency memory accesses. When a long-latency load causes the instruction window to fill up …

Performance analysis tools allow application developers to identify and characterize the
inefficiencies that cause performance degradation in their codes, allowing for application …

Irregular applications are increasingly common in diverse domains, like graph analytics and
sparse linear algebra. Accelerating these applications is challenging because of their …

The memory wall places a significant limit on performance for many modern workloads.
These applications feature complex chains of dependent, indirect memory accesses, which …

Modern and emerging architectures demand increasingly complex compiler analyses and
transformations. As the emphasis on compiler infrastructure moves beyond support for …

Superscalar out-of-order cores deliver high performance at the cost of increased complexity
and power budget. In-order cores, in contrast, are less complex and have a smaller power …

Heterogeneous systems-on-a-chip are increasingly embracing shared memory designs, in
which a single DRAM is used for both the main CPU and an integrated GPU. This …

The growing memory demands of modern applications have driven the adoption of far
memory technologies in data centers to provide cost-effective, high-capacity memory …