A Data‐Flow Soft‐Core Processor for Accelerating Scientific Calculation on FPGAs

L Verdoscia, R Giorgi - Mathematical Problems in Engineering, 2016‏ - Wiley Online Library
We present a new type of soft‐core processor called the “Data‐Flow Soft‐Core” that can be
implemented through FPGA technology with adequate interconnect resources. This …

A clockless computing system based on the static dataflow paradigm

L Verdoscia, R Vaccaro, R Giorgi - 2014 Fourth Workshop on …, 2014‏ - ieeexplore.ieee.org
The ambitious challenges posed by next exascale computing systems may require a critical
re-examination of both architecture design and consolidated wisdom in terms of …

A matrix multiplier case study for an evaluation of a configurable dataflow-machine

L Verdoscia, R Vaccaro, R Giorgi - Proceedings of the 12th ACM …, 2015‏ - dl.acm.org
Configurable computing has become a subject of a great deal of research given its potential
to greatly accelerate a wide variety of applications that require high throughput. In this …

A link prediction based unsupervised rank aggregation algorithm for informative gene selection

K Li, N Du, A Zhang - 2012 IEEE International Conference on …, 2012‏ - ieeexplore.ieee.org
Informative Gene Selection is the process of identifying relevant genes that are significantly
and differentially expressed in biological procedures. The microarray experiments …

Position paper: validity of the static dataflow approach for exascale computing challenges

L Verdoscia, R Vaccaro - 2013 Data-Flow Execution Models for …, 2013‏ - ieeexplore.ieee.org
Instead of adhering to the common wisdom that endorses multi-threading, shared memory,
and imperative programming as the only dominant models for efficient future architecture …

D3AS project: a different approach to the manycore challenges

L Verdoscia, R Vaccaro - Proceedings of the 9th Conference on …, 2012‏ - dl.acm.org
The number of cores integrated onto a single die is expected to climb steadily in the
foreseeable future. The main aim of Demand Data Driven Architecture System (D3AS) …

[PDF][PDF] A dataflow machine architecture for static dataflow program graphs

L Verdoscia - IPSI BgD Transactions on Advanced Research …, 2016‏ - ipsitransactions.org
Reconfigurability and huge density of today's de-vices constitute an ideal tool to experiment
and implement new forms of computation. The number of cores integrated onto a single die …

Codacs prototype: A platform-processor for chiara programs

L Verdoscia - 19th IEEE International Parallel and Distributed …, 2005‏ - ieeexplore.ieee.org
CODACS (configurable dataflow computing system) project target is to realize a high
performance reconfigurable computing system demonstrator able to directly execute in …

Codacs project: A development tool for embedded system prototy**

L Verdoscia - Embedded Software and Systems: First International …, 2005‏ - Springer
The advent of FPGAs and Intellectual Property core availability allow great freedom in the
customization of platform processors for embedded systems. One of the new challenges that …

[PDF][PDF] Research Article A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs

L Verdoscia, R Giorgi - 2016‏ - academia.edu
We present a new type of soft-core processor called the “Data-Flow Soft-Core” that can be
implemented through FPGA technology with adequate interconnect resources. This …