Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

Efficient FPGA implementation of address generator for WiMAX deinterleaver

BK Upadhyaya, SK Sanyal - … on Circuits and Systems II: Express …, 2013 - ieeexplore.ieee.org
In this brief, a low-complexity and novel technique is proposed to efficiently implement the
address generation circuitry of the 2-D deinterleaver used in the WiMAX transreceiver using …

Design of a novel FSM based reconfigurable multimode interleaver for WLAN application

BK Upadhyaya, SK Sanyal - 2011 International Conference on …, 2011 - ieeexplore.ieee.org
In the recent past, the IEEE 802.11 based wireless LAN has emerged as a prevailing
broadband indoor networking technology. Fast spread of wireless data communication …

FPGA Implementation Of Reconfigurable Address Generator For Various Standard Interleaver

VK Perumal, K Mahalingam… - … Conference on Intelligent …, 2023 - ieeexplore.ieee.org
This paper describes a reconfigurable design for a multi-standard address generator and
interleaver using a simpler technique. The importance of this effort is focused on the reuse of …

A reduced complexity rate-matching and channel interleaver/de-interleaver for 5G NR

JL Lakshmi, J Jayakumari - Engineering Research Express, 2024 - iopscience.iop.org
Rate matching and channel interleavers play a pivotal role in code rate adaptation and
minimizing burst errors in communication systems. The data and control channels in the Fifth …

Reconfigurable address generator for multi-standard interleaver

GS Babu, L Gopalakrishnan - Microprocessors and Microsystems, 2019 - Elsevier
This paper presents low-complex and novel techniques for designing reconfigurable
architectures for multi-standard address generator and interleaver. The emphasis of this …

A Novel Resource Sharing Channel Interleaver for 5G NR

JL Lakshmi, J Jayakumari - Advances in Electrical and …, 2023 - search.proquest.com
Abstract Fifth-Generation (5G) New Radio (NR) relies on distinct channel interleavers for
data and control channels to effectively mitigate burst errors. However, implementing these …

Low complexity and area efficient reconfigurable multimode interleaver address generator for multistandard radios

NK Venkatachalam, L Gopalakrishnan… - IET Computers & …, 2016 - Wiley Online Library
Develo** a reconfigurable transceiver to support multiple protocols seamlessly and
efficiently is an extremely tough task. Wireless standards such as wireless local area …

[PDF][PDF] Channel encoding block for mobile WiMAX networks using reconfigurable hardware

R Kunst, CB Both, F Henes - Journal of Applied …, 2011 - pdfs.semanticscholar.org
WiMAX technology aims to provide wireless metropolitan area transmissions with
guaranteed quality of service. Towards this aim, sophisticated channel encoding techniques …

[PDF][PDF] VHDL implementation of efficient multimode block interleaver for WiMAX

D Bhardwaj, SP Singh, VK Pandey… - International Journal of …, 2012 - Citeseer
Wireless communication is one of the most vibrant research areas in the communication
field today. WLAN and WiMAX are emerging standards for wireless broadband …