Understanding graphs in EDA: From shallow to deep learning

Y Ma, Z He, W Li, L Zhang, B Yu - Proceedings of the 2020 international …, 2020 - dl.acm.org
As the scale of integrated circuits keeps increasing, it is witnessed that there is a surge in the
research of electronic design automation (EDA) to make the technology node scaling …

ABCDPlace: Accelerated batch-based concurrent detailed placement on multithreaded CPUs and GPUs

Y Lin, W Li, J Gu, H Ren, B Khailany… - IEEE transactions on …, 2020 - ieeexplore.ieee.org
Placement is an important step in modern verylarge-scale integrated (VLSI) designs.
Detailed placement is a placement refining procedure intensively called throughout the …

Clock-aware ultrascale FPGA placement with machine learning routability prediction

CW Pui, G Chen, Y Ma, EFY Young… - 2017 IEEE/ACM …, 2017 - ieeexplore.ieee.org
As the complexity and scale of circuits keep growing, clocking architectures of FPGAs have
become more complex to meet the timing requirement. In this paper, to optimize wirelength …

Advancing placement

AB Kahng - Proceedings of the 2021 International Symposium on …, 2021 - dl.acm.org
Placement is central to IC physical design: it determines spatial embedding, and hence
parasitics and performance. From coarse-to fine-grain, placement is conjointly optimized …

Toward optimal legalization for mixed-cell-height circuit designs

J Chen, Z Zhu, W Zhu, YW Chang - Proceedings of the 54th Annual …, 2017 - dl.acm.org
Modern circuits often contain standard cells of different row heights to meet various design
requirements. Higher cells give larger drive strengths at the costs of larger areas and power …

ICCAD-2017 CAD contest in multi-deck standard cell legalization and benchmarks

NK Darav, IS Bustany, A Kennings… - 2017 IEEE/ACM …, 2017 - ieeexplore.ieee.org
An increasing number of multi-deck cells occupying multiple rows (eg multi-bit registers) are
used in advanced node technologies to achieve low power and high performance. The multi …

Mixed-cell-height legalization considering technology and region constraints

Z Zhu, J Chen, W Zhu, YW Chang - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Mixed-cell-height circuits have become popular in advanced technologies for better power,
area, routability, and performance tradeoffs. With technology and region constraints imposed …

An accelerated modulus-based matrix splitting iteration method for mixed-size cell circuits legalization

CC Zhou, J Qiu, Y Cao, GC Yang, QQ Shen, Q Shi - Integration, 2023 - Elsevier
Mixed-size cell circuits dominate in advanced technology node designs, with attendant
increases in layout complexity. The introduction of multi-row-height cells requires additional …

Pin-accessible legalization for mixed-cell-height circuits

H Li, WK Chow, G Chen, B Yu… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Placement is one of the most critical stages in the physical synthesis flow. Circuits with
increasing numbers of cells of multirow height have brought challenges to traditional placers …

Routability-driven and fence-aware legalization for mixed-cell-height circuits

H Li, WK Chow, G Chen, EFY Young, B Yu - Proceedings of the 55th …, 2018 - dl.acm.org
Placement is one of the most critical stages in the physical synthesis flow. Circuits with
increasing numbers of cells of multi-row height have brought challenges to traditional …