Turnitin
降AI改写
早检测系统
早降重系统
Turnitin-UK版
万方检测-期刊版
维普编辑部版
Grammarly检测
Paperpass检测
checkpass检测
PaperYY检测
Mathematical formalisms for performance evaluation of networks-on-chip
This article reviews four popular mathematical formalisms—queueing theory, network
calculus, schedulability analysis, and dataflow analysis—and how they have been applied …
calculus, schedulability analysis, and dataflow analysis—and how they have been applied …
Dynamic dataflow graphs
SS Bhattacharyya, EF Deprettere… - Handbook of Signal …, 2013 - Springer
Much of the work to date on dataflow models for signal processing system design has
focused on decidable dataflow models that are best suited for one-dimensional signal …
focused on decidable dataflow models that are best suited for one-dimensional signal …
MAPS: Map** concurrent dataflow applications to heterogeneous MPSoCs
Processor Systems on Chip (MPSoCs) in order to cope with the increasing applications
demands and the tight energy budget of portable devices. The complexity of these systems …
demands and the tight energy budget of portable devices. The complexity of these systems …
Survey on real-time networks-on-chip
Multi-Processor Systems-on-Chip (MPSoCs) have emerged as an evolution trend to meet
the growing complexity of embedded applications with increasing computation parallelism …
the growing complexity of embedded applications with increasing computation parallelism …
[BOEK][B] Programming Heterogeneous MPSoCs
JC Mazo, R Leupers - 2013 - Springer
This book is concerned with the improvement of the programming experience of today's and
upcoming embedded systems in the multimedia and wireless communication domains. In …
upcoming embedded systems in the multimedia and wireless communication domains. In …
End-to-end schedulability tests for multiprocessor embedded systems based on networks-on-chip with priority-preemptive arbitration
LS Indrusiak - Journal of systems architecture, 2014 - Elsevier
Simulation-based techniques can be used to evaluate whether a particular NoC-based
platform configuration is able to meet the timing constraints of an application, but they can …
platform configuration is able to meet the timing constraints of an application, but they can …
Efficient computation of buffer capacities for cyclo-static dataflow graphs
A key step in the design of cyclo-static real-time systems is the determination of buffer
capacities. In our multi-processor system, we apply back-pressure, which means that tasks …
capacities. In our multi-processor system, we apply back-pressure, which means that tasks …
Avoiding message‐dependent deadlock in network‐based systems on chip
Networks on chip (NoCs) are an essential component of systems on chip (SoCs) and much
research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router …
research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router …
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
This paper proposes a scheduling strategy and an automatic scheduling flow that enable the
simultaneous execution of multiple hard-real-time dataflow jobs. Each job has its own …
simultaneous execution of multiple hard-real-time dataflow jobs. Each job has its own …
Hard-real-time scheduling of data-dependent tasks in embedded streaming applications
Most of the hard-real-time scheduling theory for multiprocessor systems assumes
independent periodic or sporadic tasks. Such a simple task model is not directly applicable …
independent periodic or sporadic tasks. Such a simple task model is not directly applicable …