Coarse grained reconfigurable architectures in the past 25 years: Overview and classification

M Wijtvliet, L Waeijen… - … Conference on Embedded …, 2016 - ieeexplore.ieee.org
Reconfigurable architectures become more popular now general purpose compute
performance does not increase as rapidly as before. Field programmable gate arrays are …

[PDF][PDF] An overview of reconfigurable hardware in embedded systems

P Garcia, K Compton, M Schulte, E Blem… - EURASIP Journal on …, 2006 - Springer
Over the past few years, the realm of embedded systems has expanded to include a wide
variety of products, ranging from digital cameras, to sensor networks, to medical imaging …

A decade of reconfigurable computing: a visionary retrospective

R Hartenstein - Proceedings design, automation and test in …, 2001 - ieeexplore.ieee.org
The paper surveys a decade of R&D on coarse grain reconfigurable hardware and related
CAD, points out why this emerging discipline is heading toward a dichotomy of computing …

[BUCH][B] Reconfigurable computing: Accelerating computation with field-programmable gate arrays

MB Gokhale, PS Graham - 2006 - books.google.com
A one-of-a-kind survey of the field of Reconfigurable Computing Gives a comprehensive
introduction to a discipline that offers a 10X-100X acceleration of algorithms over …

Coarse grain reconfigurable architecture (embedded tutorial)

R Hartenstein - Proceedings of the 2001 Asia and South Pacific Design …, 2001 - dl.acm.org
Coarse grain reconfigurable architecture (embedded tutorial) Page 1 Abstract. The paper gives
a brief survey over a decade of R&D on coarse grain reconfigurable hardware and related …

Using history information to improve design flaws detection

D Rapu, S Ducasse, T Gîrba… - … Conference on Software …, 2004 - ieeexplore.ieee.org
As systems evolve and their structure decays, maintainers need accurate and automatic
identification of the design problems. Current approaches for automatic detection of design …

FPGA implementation of high speed FIR filters using add and shift method

S Mirzaei, A Hosangadi… - … Conference on Computer …, 2006 - ieeexplore.ieee.org
We present a method for implementing high speed finite impulse response (FIR) filters using
just registered adders and hardwired shifts. We extensively use a modified common …

Towards higher performance and robust compilation for cgra modulo scheduling

Z Zhao, W Sheng, Q Wang, W Yin, P Ye… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Coarse-Grained Reconfigurable Architectures (CGRA) is a promising solution for
accelerating computation intensive tasks due to its good trade-off in energy efficiency and …

A reconfigurable baseband platform based on an asynchronous network-on-chip

D Lattard, E Beigne, F Clermidy… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
In order to face the inherent complexity of new radio access technologies and to address the
development of multi-standard devices, an innovative reconfigurable baseband architecture …

Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements

PL Master, E Hogenauer, WJ Scheuermann - US Patent 7,325,123, 2008 - Google Patents
An integrated circuit having computational elements. As least one of the computational
elements has a fixed archi tecture. An interconnection network is coupled to a first group of …