This paper presents a new pattern run-length compression method whose decompressor is
simple and easy to implement. It encodes 2| n| runs of compatible or inversely compatible …

In this paper, we present a hybrid X-filling and two-stage test data compression (TS-TDC)
techniques for digital VLSI circuits to reduce the test power and test data volume …

A new scheme of test data compression based on run-length, namely equal-run-length
coding (ERLC) is presented. It is based on both types of runs of 0's and 1's and explores the …

In the big data era, image compression is of significant importance in today's world.
Importantly, compression of large sized images is required for everyday tasks; including …

Growing test data volume and excessive test application time are two serious concerns in
scan-based testing for SoCs. This paper presents an efficient test-independent compression …

This paper presents a unified test data compression approach, which simultaneously
reduces test data volume, scan power consumption and test application time for a system-on …

A power efficient System-on-a-Chip test data compression method using alternating
statistical run-length coding is proposed. To effectively reduce test power dissipation, the test …

In this paper, we present two multistage compression techniques to reduce the test data
volume in scan test applications. We have proposed two encoding schemes namely …

A new test data compression scheme for circular scan architecture is proposed in this paper.
A stochastic heuristic based bio-inspired optimization approach namely ant colony algorithm …

Abstract An adaptive Extended Frequency-Directed Run-length (EFDR) code method for test
data compression is presented in this paper. The method is based on EFDR code, and adds …