US10515981B2 - Multilevel semiconductor device and structure with memory - Google
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …

H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …

A semiconductor devise includes a first substrate and a second substrate which are bonded
each other. A first substrate includes an insulating first surface film as an uppermost layer, a …

A device, including: a first structure including first memory cells, the first memory cells
including first transistors; and a second structure including second memory cells, the second …

A method for processing a 3D semiconductor device, the method including: providing a
wafer including a plurality of first dies, the plurality of first dies including a first transistor layer …

A multilevel semiconductor device including: a first level including a first array of first memory
cells and first control line; a second level including a second array of second memory cells …

H01L23/522—Arrangements for conducting electric current within the device in operation
from one component to another, ie interconnections, eg wires, lead frames including …

A 3D memory device, the device including: a first single crystal layer including memory
peripheral circuits; a first memory layer including a first junction-less transistor; a second …

(57) ABSTRACT A multi-layer semiconductor device (or structure) includes at least two
semiconductor structures, each of the at least two semiconductor structures having first and …

A method of manufacturing a semiconductor device includes: a step of forming an inorganic
insulating film and an organic insulating film on one surface of a first substrate; a step of …