N-type Schottky barrier source/drain MOSFET using ytterbium silicide
S Zhu, J Chen, MF Li, SJ Lee, J Singh… - IEEE Electron …, 2004 - ieeexplore.ieee.org
Ytterbium silicide, for the first time, was used to form the Schottky barrier source/drain (S/D)
of N-channel MOSFETs. The device fabrication was performed at low temperature, which is …
of N-channel MOSFETs. The device fabrication was performed at low temperature, which is …
Flexible low-power source-gated transistors with solution-processed metal–oxide semiconductors
Source-gated transistors (SGTs) with Schottky barriers have emerged as extraordinary
candidates for constructing low-power electronics by virtue of device simplicity, high gain …
candidates for constructing low-power electronics by virtue of device simplicity, high gain …
Nonlinear properties of ballistic nanoelectronic devices
Advanced lithographic techniques allow the fabrication of strongly confined semiconductor
nanostructures in which carriers travel without suffering from inelastic scattering even for …
nanostructures in which carriers travel without suffering from inelastic scattering even for …
Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode
S Zhu, HY Yu, SJ Whang, JH Chen… - IEEE Electron …, 2004 - ieeexplore.ieee.org
This letter presents a low-temperature process to fabricate Schottky-barrier silicide
source/drain transistors (SSDTs) with high-/spl kappa/gate dielectric and metal gate. For p …
source/drain transistors (SSDTs) with high-/spl kappa/gate dielectric and metal gate. For p …
Novel reconfigurable field-effect transistor with asymmetric spacer engineering at drain side
Y Yao, Y Sun, X Li, Y Shi, Z Liu - IEEE Transactions on Electron …, 2020 - ieeexplore.ieee.org
In this article, a novel reconfigurable field-effect transistor with an asymmetric underlap
channel extension at drain side (UCED-RFET) is proposed for the first time. The influence of …
channel extension at drain side (UCED-RFET) is proposed for the first time. The influence of …
On the physical behavior of cryogenic IV and III–V Schottky barrier MOSFET devices
The physical influence of temperature down to the cryogenic regime is analyzed in a
comprehensive study and the comparison of IV and III-V Schottky barrier (SB) double-gate …
comprehensive study and the comparison of IV and III-V Schottky barrier (SB) double-gate …
A 50-nm-gate-length erbium-silicided n-type Schottky barrier metal-oxide-semiconductor field-effect transistor
M Jang, Y Kim, J Shin, S Lee, K Park - Applied physics letters, 2004 - pubs.aip.org
The theoretical and experimental current–voltage characteristics of 50-nm-gate-length
erbium-silicided n-type Schottky barrier metal-oxide-semiconductor field-effect transistors …
erbium-silicided n-type Schottky barrier metal-oxide-semiconductor field-effect transistors …
Scaling of dopant segregation Schottky barrier using metal strip buried oxide MOSFET and its comparison with conventional device
In this paper, a Schottky barrier silicon-on-insulator (SOI) MOSFET with asymmetric do**
(dopant segregated) at the source/drain side and a metal strip in the BOX (Buried oxide) …
(dopant segregated) at the source/drain side and a metal strip in the BOX (Buried oxide) …
A comparative study of dopant-segregated Schottky and raised source/drain double-gate MOSFETs
RA Vega, TJK Liu - IEEE transactions on electron devices, 2008 - ieeexplore.ieee.org
The performance of symmetric double-gate MOSFETs with dopant-segregated Schottky
(DSS) source/drain (S/D) regions is investigated through a TCAD modeling study and …
(DSS) source/drain (S/D) regions is investigated through a TCAD modeling study and …
Impact of ferroelectric on the electrical characteristics of silicon–germanium based heterojunction Schottky barrier FET
This work investigates the impact of ferroelectric gate oxide on high-k gate dielectric with low
band gap Silicon Germanium ferroelectric Schottky barrier FET (SiGe Fe-SBFET), has been …
band gap Silicon Germanium ferroelectric Schottky barrier FET (SiGe Fe-SBFET), has been …