Field programmable gate array applications—A scientometric review
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …
that can be configured by a customer after manufacturing to perform from a simple logic gate …
[HTML][HTML] Understanding radiation effects in SRAM-based field programmable gate arrays for implementing instrumentation and control systems of nuclear power plants
Field programmable gate arrays (FPGAs) are getting more attention in safety-related and
safety-critical application development of nuclear power plant instrumentation and control …
safety-critical application development of nuclear power plant instrumentation and control …
[BOOK][B] Fault-tolerance techniques for SRAM-based FPGAs
This book presents fault-tolerant techniques for programmable architectures, the well-known
Field Programmable Gate Arrays (FPGAs), customizable by SRAM. FPGAs are becoming …
Field Programmable Gate Arrays (FPGAs), customizable by SRAM. FPGAs are becoming …
A new reliability-oriented place and route algorithm for SRAM-based FPGAs
The very high integration levels reached by VLSI technologies for SRAM-based field
programmable gate arrays (FPGAs) lead to high occurrence-rate of transient faults induced …
programmable gate arrays (FPGAs) lead to high occurrence-rate of transient faults induced …
AURORA: A vision-based roadway departure warning system
M Chen, T Jochem, D Pomerleau - Proceedings 1995 IEEE …, 1995 - ieeexplore.ieee.org
AURORA is a vision-based system designed to warn a vehicle driver of possible impending
roadway departure accidents. It employs a downward looking color video camera with a …
roadway departure accidents. It employs a downward looking color video camera with a …
Analysis of the robustness of the TMR architecture in SRAM-based FPGAs
Non radiation-hardened SRAM-based Field Programmable Gate Arrays (FPGAs) are very
sensitive to Single Event Upsets (SEUs) affecting their configuration memory and thus …
sensitive to Single Event Upsets (SEUs) affecting their configuration memory and thus …
Evaluating one-hot encoding finite state machines for SEU reliability in SRAM-based FPGAs
M Cassel, F Lima - 12th IEEE International On-Line Testing …, 2006 - ieeexplore.ieee.org
This work discusses the use of two fault-tolerant techniques, duplication with self-checking
and triple modular redundancy, for one-hot encoding FSM in SRAM-based techniques. The …
and triple modular redundancy, for one-hot encoding FSM in SRAM-based techniques. The …
Fast terrain classification using variable-length representation for autonomous navigation
We propose a method for learning using a set of feature representations which retrieve
different amounts of information at different costs. The goal is to create a more efficient …
different amounts of information at different costs. The goal is to create a more efficient …
Fault tolerant methods for reliability in FPGAs
E Stott, P Sedcole, PYK Cheung - … International Conference on …, 2008 - ieeexplore.ieee.org
Reliability and process variability are serious issues for FPGAs in the future. Fortunately
FPGAs have the ability to reconfigure in the field and at runtime, thus providing opportunities …
FPGAs have the ability to reconfigure in the field and at runtime, thus providing opportunities …
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC
designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tolerant …
designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tolerant …