A survey of techniques for cache partitioning in multicore processors
S Mittal - ACM Computing Surveys (CSUR), 2017 - dl.acm.org
As the number of on-chip cores and memory demands of applications increase, judicious
management of cache resources has become not merely attractive but imperative. Cache …
management of cache resources has become not merely attractive but imperative. Cache …
Taming non-blocking caches to improve isolation in multicore real-time systems
In this paper, we show that cache partitioning does not necessarily ensure predictable cache
performance in modern COTS multicore platforms that use non-blocking caches to exploit …
performance in modern COTS multicore platforms that use non-blocking caches to exploit …
DAG Scheduling with Execution Groups
In many modern safety-critical cyber-physical sys-tems, such as in the automotive or robotic
domain, the appli-cation complexity requires the use of multi-core platforms to execute all …
domain, the appli-cation complexity requires the use of multi-core platforms to execute all …
MEDUSA: a predictable and high-performance DRAM controller for multicore based embedded systems
Commercial-Off-The-Shelf (COTS) DRAM controllers are optimized for high memory
throughput, but they do not provide predictable timing among memory requests from …
throughput, but they do not provide predictable timing among memory requests from …
RT-Gang: Real-time gang scheduling framework for safety-critical systems
In this paper, we present RT-Gang: a novel real-time gang scheduling framework that
enforces a one-gang-at-a-time policy. We find that, in a multicore platform, co-scheduling …
enforces a one-gang-at-a-time policy. We find that, in a multicore platform, co-scheduling …
Schedulability analysis of tasks with corunner-dependent execution times
Consider fixed-priority preemptive partitioned scheduling of constrained-deadline sporadic
tasks on a multiprocessor. A task generates a sequence of jobs and each job has a deadline …
tasks on a multiprocessor. A task generates a sequence of jobs and each job has a deadline …
Guard-NoC: A protection against side-channel attacks for MPSoCs
C Reinbrecht, A Aljuffri, S Hamdioui… - 2020 IEEE Computer …, 2020 - ieeexplore.ieee.org
Multi-Processor System-on-Chips (MPSoCs) are popular computational platforms for a wide
variety of applications due to their energy efficiency and flexibility. Like many other platforms …
variety of applications due to their energy efficiency and flexibility. Like many other platforms …
Heterogeneous multicore SDRAM interference analysis
A Mascareñas González, F Boniol… - Proceedings of the 29th …, 2021 - dl.acm.org
The purpose of this paper is to describe a set of DDR3 SDRAM interference estimation cost
functions. The arbitration system of the SDRAM controller heavily impact the interference …
functions. The arbitration system of the SDRAM controller heavily impact the interference …
[PDF][PDF] Parameter analysis of interfering applications in multi-core environment for throughput enhancement
SK Shukla, PK Chande - International Journal of Engineering and …, 2019 - researchgate.net
In Multi-core systems the applications co-execute in Multi-programmed mode, have interfere
with each other during execution, which creates resource bottleneck affecting the …
with each other during execution, which creates resource bottleneck affecting the …
Methodology of Combining Empirical Stress Testing and Formal-Methods Based Schedulability Analysis for Real-Time Multicore Software
B Andersson, D de Niz, W Vance, J Ross… - 2023 IEEE/AIAA …, 2023 - ieeexplore.ieee.org
Current certification guidance documents for aircraft provide plans, processes, and
objectives. This has been successful in terms of achieving safety but it comes at the expense …
objectives. This has been successful in terms of achieving safety but it comes at the expense …