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Making convolutions resilient via algorithm-based error detection techniques
Convolutional Neural Networks (CNNs) are being increasingly used in safety-critical and
high-performance computing systems. As such systems require high levels of resilience to …
high-performance computing systems. As such systems require high levels of resilience to …
[HTML][HTML] Open-source IP cores for space: A processor-level perspective on soft errors in the RISC-V era
This paper discusses principles and techniques to evaluate processors for dependable
computing in space applications. The focus is on soft errors, which dominate the failure rate …
computing in space applications. The focus is on soft errors, which dominate the failure rate …
Optimizing software-directed instruction replication for gpu error detection
Application execution on safety-critical and high-performance computer systems must be
resilient to transient errors. As GPUs become more pervasive in such systems, they must …
resilient to transient errors. As GPUs become more pervasive in such systems, they must …
Hardnn: Feature map vulnerability evaluation in cnns
As Convolutional Neural Networks (CNNs) are increasingly being employed in safety-critical
applications, it is important that they behave reliably in the face of hardware errors. Transient …
applications, it is important that they behave reliably in the face of hardware errors. Transient …
Run-time reconfigurable MPSoC-based on-board processor for vision-based space navigation
This paper describes a reconfigurable architecture for an on-board processor to be used in
space exploration critical systems. It relies on, a dynamically reconfigurable multi …
space exploration critical systems. It relies on, a dynamically reconfigurable multi …
The Arm triple core lock-step (TCLS) processor
The Arm Triple Core Lock-Step (TCLS) architecture is the natural evolution of Arm Cortex-R
Dual Core Lock-Step (DCLS) processors to increase dependability, predictability, and …
Dual Core Lock-Step (DCLS) processors to increase dependability, predictability, and …
Soft error vulnerability assessment of the real-time safety-related ARM Cortex-R5 CPU
This paper presents the results collected in a series of fault injection experiments conducted
on a modern commercial embedded ARM Cortex-R5 processor, which is extensively used in …
on a modern commercial embedded ARM Cortex-R5 processor, which is extensively used in …
Variable delayed dual-core lockstep (vdcls) processor for safety and security applications
Dual-Core Lockstep (DCLS) is one of the most commonly used techniques in applications
requiring functional safety. As the semiconductor process nodes keep shrinking, the DCLS …
requiring functional safety. As the semiconductor process nodes keep shrinking, the DCLS …
Scalable parallel flash firmware for many-core architectures
NVMe is designed to unshackle flash from a traditional storage bus by allowing hosts to
employ many threads to achieve higher bandwidth. While NVMe enables users to fully …
employ many threads to achieve higher bandwidth. While NVMe enables users to fully …
Particle filtering with factorized likelihoods for tracking facial features
In the recent years particle filtering has been the dominant paradigm for tracking facial and
body features, recognizing temporal events and reasoning in uncertainty. A major problem …
body features, recognizing temporal events and reasoning in uncertainty. A major problem …