Rowpress: Amplifying read disturbance in modern dram chips
Memory isolation is critical for system reliability, security, and safety. Unfortunately, read
disturbance can break memory isolation in modern DRAM chips. For example, RowHammer …
disturbance can break memory isolation in modern DRAM chips. For example, RowHammer …
Artificial neural networks for space and safety-critical applications: Reliability issues and potential solutions
P Rech - IEEE Transactions on Nuclear Science, 2024 - ieeexplore.ieee.org
Machine learning is among the greatest advancements in computer science and
engineering and is today used to classify or detect objects, a key feature in autonomous …
engineering and is today used to classify or detect objects, a key feature in autonomous …
An experimental analysis of RowHammer in HBM2 DRAM chips
RowHammer (RH) is a significant and worsening security, safety, and reliability issue of
modern DRAM chips that can be exploited to break memory isolation. Therefore, it is …
modern DRAM chips that can be exploited to break memory isolation. Therefore, it is …
A multi-level approach to evaluate the impact of GPU permanent faults on CNN's reliability
Graphics processing units (GPUs) are widely used to accelerate Artificial Intelligence
applications, such as those based on Convolutional Neural Networks (CNNs). Since in …
applications, such as those based on Convolutional Neural Networks (CNNs). Since in …
Read disturbance in high bandwidth memory: A detailed experimental study on hbm2 dram chips
We experimentally demonstrate the effects of read disturbance (RowHammer and
RowPress) and uncover the inner workings of undocumented read disturbance defense …
RowPress) and uncover the inner workings of undocumented read disturbance defense …
Understanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units
Modern Graphics Processing Units (GPUs) demand life expectancy extended to many years,
exposing the hardware to aging (ie, permanent faults arising after the end-of-manufacturing …
exposing the hardware to aging (ie, permanent faults arising after the end-of-manufacturing …
Structural coding: A low-cost scheme to protect cnns from large-granularity memory faults
The advent of High-Performance Computing has led to the adoption of Convolutional Neural
Networks (CNNs) in safety-critical applications such as autonomous vehicles. However …
Networks (CNNs) in safety-critical applications such as autonomous vehicles. However …
Transient-fault-aware design and training to enhance dnns reliability with zero-overhead
Deep Neural Networks (DNNs) enable a wide series of technological advancements,
ranging from clinical imaging, to predictive industrial maintenance and autonomous driving …
ranging from clinical imaging, to predictive industrial maintenance and autonomous driving …
Cross-Layer Reliability Evaluation and Efficient Hardening of Large Vision Transformers Models
Vision Transformers (ViTs) are highly accurate Machine Learning (ML) models. However,
their large size and complexity increase the expected error rate due to hardware faults …
their large size and complexity increase the expected error rate due to hardware faults …
Unity ECC: Unified Memory Protection Against Bit and Chip Errors
DRAM vendors utilize On-Die Error Correction Codes (OD-ECC) to correct random bit errors
internally. Meanwhile, system companies utilize Rank-Level ECC (RL-ECC) to protect data …
internally. Meanwhile, system companies utilize Rank-Level ECC (RL-ECC) to protect data …