Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

Secure hash algorithms and the corresponding FPGA optimization techniques

ZA Al-Odat, M Ali, A Abbas, SU Khan - ACM Computing Surveys (CSUR), 2020 - dl.acm.org
Cryptographic hash functions are widely used primitives with a purpose to ensure the
integrity of data. Hash functions are also utilized in conjunction with digital signatures to …

FPGA-based SPHINCS+ Implementations: Mind the Glitch

D Amiet, L Leuenberger, A Curiger… - 2020 23rd Euromicro …, 2020 - ieeexplore.ieee.org
The digital signature scheme SPHINCS+ is a candidate in the NIST post-quantum project,
whose aim is to standardize cryptographic systems that are secure against attacks …

A new high throughput and area efficient SHA-3 implementation

MM Wong, J Haj-Yahya, S Sau… - … on Circuits and …, 2018 - ieeexplore.ieee.org
High performance and area efficient Secure Hash Algorithm (SHA-3) hardware realization is
investigated and proposed in this work. In addition to the new and simplified round constant …

Comparative study of Keccak SHA-3 implementations

A Dolmeta, M Martina, G Masera - Cryptography, 2023 - mdpi.com
This paper conducts an extensive comparative study of state-of-the-art solutions for
implementing the SHA-3 hash function. SHA-3, a pivotal component in modern …

High throughput implementation of SHA3 hash algorithm on field programmable gate array (FPGA)

S El Moumni, M Fettach, A Tragha - Microelectronics journal, 2019 - Elsevier
Cryptographic hash function is an essential element in sensitive communications, such as
banking, military and health. It ensures secure communication by checking data integrity …

Efficient FPGA implementation of the SHA-3 hash function

M Sundal, R Chaves - 2017 IEEE Computer Society Annual …, 2017 - ieeexplore.ieee.org
In this paper, three different approaches are considered for FPGA based implementations of
the SHA-3 hash functions. While the performance of proposed unfolded and pipelined …

On efficiency enhancement of SHA-3 for FPGA-based multimodal biometric authentication

MM Sravani, SA Durai - IEEE Transactions on Very Large Scale …, 2022 - ieeexplore.ieee.org
Synchronized padder block and a compact-dynamic round constant (RC) generator to
achieve highly efficient Keccak architecture are proposed in this work. The proposed design …

High speed FPGA implementation of cryptographic KECCAK hash function crypto-processor

F Kahri, H Mestiri, B Bouallegue… - Journal of Circuits …, 2016 - World Scientific
Cryptographic hash functions are at the heart of many information security applications like
message authentication codes (MACs), digital signatures and other forms of authentication …

High performance pipelined FPGA implementation of the SHA-3 hash algorithm

L Ioannou, HE Michail… - 2015 4th Mediterranean …, 2015 - ieeexplore.ieee.org
The SHA-3 cryptographic hash algorithm is standardized in FIPS 202. We present a
pipelined hardware architecture supporting all the four SHA-3 modes of operation and a …