GenMC: A Model Checker for Weak Memory Models

M Kokologiannakis, V Vafeiadis - International Conference on Computer …, 2021 - Springer
GenMC is an LLVM-based state-of-the-art stateless model checker for concurrent C/C++
programs. Its modular infrastructure allows it to support complex memory models, such as …

Choice trees: Representing nondeterministic, recursive, and impure programs in coq

N Chappe, P He, L Henrio, Y Zakowski… - Proceedings of the ACM …, 2023 - dl.acm.org
This paper introduces ctrees, a monad for modeling nondeterministic, recursive, and impure
programs in Coq. Inspired by **a et al.'s itrees, this novel data structure embeds …

Compass: strong and compositional library specifications in relaxed memory separation logic

HH Dang, J Jung, J Choi, DT Nguyen… - Proceedings of the 43rd …, 2022 - dl.acm.org
Several functional correctness criteria have been proposed for relaxed-memory consistency
libraries, but most lack support for modular client reasoning. Mével and Jourdan recently …

What's Decidable About Causally Consistent Shared Memory?

O Lahav, U Boker - ACM Transactions on Programming Languages and …, 2022 - dl.acm.org
While causal consistency is one of the most fundamental consistency models weaker than
sequential consistency, the decidability of safety verification for (finite-state) concurrent …

A two-phase infinite/finite low-level memory model: Reconciling integer–pointer casts, finite space, and undef at the llvm ir level of abstraction

C Beck, I Yoon, H Chen, Y Zakowski… - Proceedings of the ACM …, 2024 - dl.acm.org
This paper provides a novel approach to reconciling complex low-level memory model
features, such as pointer--integer casts, with desired refinements that are needed to justify …

The leaky semicolon: compositional semantic dependencies for relaxed-memory concurrency

A Jeffrey, J Riely, M Batty, S Cooksey, I Kaysin… - Proceedings of the …, 2022 - dl.acm.org
Program logics and semantics tell a pleasant story about sequential composition: when
executing (S1; S2), we first execute S1 then S2. To improve performance, however …

Lasagne: a static binary translator for weak memory model architectures

RCO Rocha, D Sprokholt, M Fink, R Gouicem… - Proceedings of the 43rd …, 2022 - dl.acm.org
The emergence of new architectures create a recurring challenge to ensure that existing
programs still work on them. Manually porting legacy code is often impractical. Static binary …

Unifying operational weak memory verification: an axiomatic approach

S Doherty, S Dalvandi, B Dongol… - ACM Transactions on …, 2022 - dl.acm.org
In this article, we propose an approach to program verification using an abstract
characterisation of weak memory models. Our approach is based on a hierarchical axiom …

Extending Intel-x86 consistency and persistency: formalising the semantics of Intel-x86 memory types and non-temporal stores

A Raad, L Maranget, V Vafeiadis - Proceedings of the ACM on …, 2022 - dl.acm.org
Existing semantic formalisations of the Intel-x86 architecture cover only a small fragment of
its available features that are relevant for the consistency semantics of multi-threaded …

Semantics of Remote Direct Memory Access: Operational and Declarative Models of RDMA on TSO Architectures

G Ambal, B Dongol, H Eran, V Klimis, O Lahav… - Proceedings of the …, 2024 - dl.acm.org
Remote direct memory access (RDMA) is a modern technology enabling networked
machines to exchange information without involving the operating system of either side, and …