Multi-gate device and method of fabrication thereof
KC Ching, CC Wu, CF Huang, WH Hsieh… - US Patent …, 2020 - Google Patents
(57) ABSTRACT A semiconductor includes a first transistor and a second transistor. The first
transistor includes a first and a second epitaxial layer, formed of a first semiconductor …
transistor includes a first and a second epitaxial layer, formed of a first semiconductor …
Replacement III-V or germanium nanowires by unilateral confined epitaxial growth
A lateral epitaxial growth process is employed to facilitate the fabrication of a semiconductor
structure including a stack of suspended III-V or germanium semiconductor nanowires that …
structure including a stack of suspended III-V or germanium semiconductor nanowires that …
Multi-gate device and method of fabrication thereof
KC Ching, CC Wu, CF Huang, WH Hsieh… - US Patent …, 2018 - Google Patents
A semiconductor includes a first transistor and a second transistor. The first transistor
includes a first and a second epitaxial layer, formed of a first semiconductor material. The …
includes a first and a second epitaxial layer, formed of a first semiconductor material. The …
Methods of forming nanowire devices with doped extension regions and the resulting devices
(57) ABSTRACT A method of forming a nanowire device includes patterning a plurality of
semiconductor material layers such that each layer has first and second exposed end …
semiconductor material layers such that each layer has first and second exposed end …
Method of manufacturing a semiconductor device and a semiconductor device
CC Cheng, CF Hsu, C Tzu-Chiang, TY Lee… - US Patent …, 2020 - Google Patents
In a method of manufacturing a semiconductor device, a fin structure, in which first
semiconductor layers and second semiconductor layers are alternately stacked, is formed. A …
semiconductor layers and second semiconductor layers are alternately stacked, is formed. A …
Methods of forming nanowire devices with spacers and the resulting devices
(57) ABSTRACT A method of forming a nanowire device includes forming semiconductor
material layers above a semiconductor Sub strate, forming a gate structure above the …
material layers above a semiconductor Sub strate, forming a gate structure above the …
Multiple-stacked semiconductor nanowires and source/drain spacers
M Van Dal, G Doornbos, CT Lin - US Patent 10,756,174, 2020 - Google Patents
(57) ABSTRACT A semiconductor device includes a substrate, a gate struc ture, at least one
nanowire, at least one epitaxy structure, and at least one source/drain spacer. The gate …
nanowire, at least one epitaxy structure, and at least one source/drain spacer. The gate …
Gate-all-around structure and manufacturing method for the same
CC Cheng, YL Yang, IS Chen… - US Patent 10,868,127, 2020 - Google Patents
Present disclosure provides gate-all-around structure includ ing a first transistor. The first
transistor includes a semicon ductor substrate having a top surface, a first nanowire over the …
transistor includes a semicon ductor substrate having a top surface, a first nanowire over the …
Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs
Field effect transistors include a stack of nanosheets of vertically arranged channel layers. A
source and drain region is positioned at respective ends of the vertically arranged channel …
source and drain region is positioned at respective ends of the vertically arranged channel …
Preventing threshold voltage variability in stacked nanosheets
MA Guillorn, NJ Loubet - US Patent 10,177,226, 2019 - Google Patents
Embodiments are directed to a method of forming a stacked nanosheet and resulting
structures having equal thickness work function metal layers. A nanosheet stack is formed …
structures having equal thickness work function metal layers. A nanosheet stack is formed …