An Overview of Quantum Latin Squares in Quantum Information Theory

A Fatah, I McLoughlin, S Ghafoor… - … Conference on Quantum …, 2024 - ieeexplore.ieee.org
Quantum Latin Squares have emerged as mathematical structures of interest in quantum
information theory. This paper provides a comprehensive overview of quantum Latin …

Avoiding flow size overestimation in Count-Min sketch with Bloom filter constructions

O Rottenstreich, P Reviriego, E Porat… - … on Network and …, 2021 - ieeexplore.ieee.org
The Count-Min sketch is the most popular data structure for flow size estimation, a basic
measurement task required in many networks. Typically the number of potential flows is …

Low redundancy matrix-based codes for adjacent error correction with parity sharing

S Liu, L **ao, J Li, Y Zhou, Z Mao - 2017 18th International …, 2017 - ieeexplore.ieee.org
As CMOS technology scales down, multiple cell upsets (MCUs) caused by a single radiation
particle have become one of the most challenging reliability issues for memories in space …

Constructions and applications for accurate counting of the bloom filter false positive free zone

O Rottenstreich, P Reviriego, E Porat… - Proceedings of the …, 2020 - dl.acm.org
Bloom filters are used in many networking applications to answer set membership queries at
low cost but suffer from false positives. We study Bloom filter constructions that when …

Extend orthogonal Latin square codes for 32-bit data protection in memory applications

S Liu, L **ao, Z Mao - Microelectronics Reliability, 2016 - Elsevier
As CMOS technology size scales down, multiple cell upsets (MCUs) caused by a single
radiation particle have become one of the most challenging reliability issues for memories …

A scheme to reduce the number of parity check bits in orthogonal Latin square codes

P Reviriego, S Liu, A Sánchez-Macián… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
The use of error-correcting codes is a common strategy to protect memories from errors.
Single-error correction, double-error detection linear block codes have been traditionally …

SALE: smartly allocating low-cost many-bit ECC for mitigating read and write errors in STT-RAM caches

MA Qureshi, J Park, S Kim - IEEE transactions on very large …, 2020 - ieeexplore.ieee.org
Spin-transfer torque RAM (STT-RAM) is a future technology for ON-chip caches. However, it
suffers from high read and write error rates. Concurrently dealing with these errors is quite …

Modified single error correction orthogonal latin square scheme to reduce parity check bits

RA Ahmed - Microprocessors and Microsystems, 2022 - Elsevier
Single-error correction (SEC) codes play a critical role in ensuring cache reliability. In ultra-
high-speed caches, decoding delay is a key element to consider when selecting an SEC …

Towards a Latin-square search engine

W Fang, RJ Stones, TG Marbach… - 2019 IEEE Intl Conf on …, 2019 - ieeexplore.ieee.org
Latin squares are combinatorial matrices that are widely used in diverse areas of research
such as codes and cryptography, software testing, mathematical research, and experimental …

Error Detection and Correction Using RP SEC-DED

N Farheen, KS Pande - 2020 4th International Conference on …, 2020 - ieeexplore.ieee.org
Error correcting codes are widely used to protect memories from radiation induced soft
errors. With the advancement of the technology node, soft errors affect more than one bit in …