A survey on coarse-grained reconfigurable architectures from a performance perspective

A Podobas, K Sano, S Matsuoka - IEEE Access, 2020 - ieeexplore.ieee.org
With the end of both Dennard's scaling and Moore's law, computer users and researchers
are aggressively exploring alternative forms of computing in order to continue the …

Integer Linear Programming based Simultaneous Scheduling and Binding for SiLago Framework

D Pudi, S Malviya, S Boppu, Y Yang, A Hemani… - IEEE …, 2024 - ieeexplore.ieee.org
Coarse-Grained Reconfigurable Array (CGRA) architectures are potential high-performance
and power-efficient platforms. However, map** applications efficiently on CGRA, which …

39.9 GOPs/watt multi-mode CGRA accelerator for a multi-standard basestation

N Farahini, S Li, MA Tajammul… - … on Circuits and …, 2013 - ieeexplore.ieee.org
This paper presents an industrial case study of using a Coarse Grain Reconfigurable
Architecture (CGRA) for a multi-mode accelerator for two kernels: FFT for the LTE standard …

System level synthesis of hardware for DSP applications using pre-characterized function implementations

S Li, N Farahini, A Hemani, K Rosvall… - … on Hardware/Software …, 2013 - ieeexplore.ieee.org
SYLVA is a system level synthesis framework that transforms DSP sub-systems modeled as
synchronous data flow into hardware implementations in ASIC, FPGAs or CGRAs. SYLVA …

Synchoros VLSI design style

D Stathis - 2022 - diva-portal.org
Computers have become essential to everyday life as much as electricity, communications
and transport. That is evident from the amount of electricity we spend to power our …

Neurocgra: A cgra with support for neural networks

SMAH Jafri, TN Gia, S Dytckov… - … Conference on High …, 2014 - ieeexplore.ieee.org
Today, Coarse Grained Reconfigurable Architectures (CGRAs) are becoming an
increasingly popular implementation platform. In real world applications, the CGRAs are …

Configurable FFT processor using dynamically reconfigurable resource arrays

MA Shami, MA Tajammul, A Hemani - Journal of Signal Processing …, 2019 - Springer
This paper presents results of using a Coarse Grain Reconfigurable Architecture called
DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in …

Application Level Synthesis: Creating Matrix-Matrix Multiplication Library, A Case Study

D Pudi, Y Yang, D Stathis, SK Prajapati, S Boppu… - IEEE …, 2024 - ieeexplore.ieee.org
Efficiently synthesizing an entire application that consists of multiple algorithms for hardware
implementation is a very difficult and unsolved problem. One of the main challenges is the …

Transmap: Transformation based remap** and parallelism for high utilization and energy efficiency in cgras

SMAH Jafri, M Daneshtalab, N Abbas… - IEEE Transactions …, 2016 - ieeexplore.ieee.org
In the era of platforms hosting multiple applications with arbitrary inter application
communication and computation patterns, compile time map** decisions are neither …