Upward packet popup for deadlock freedom in modular chiplet-based systems
Monolithic SoCs can be decomposed into disparate chiplets that support integration with
advanced pack-aging technologies. This concept is promising in reducing the manufacturing …
advanced pack-aging technologies. This concept is promising in reducing the manufacturing …
Disjoint paths construction and fault-tolerant routing in BCube of data center networks
BCube is a promising structure of data center network, as it can significantly improve the
performance of typical applications. With the expansion of network scale and increasement …
performance of typical applications. With the expansion of network scale and increasement …
Application defined on-chip networks for heterogeneous chiplets: An implementation perspective
T Wang, F Feng, S **ang, Q Li… - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
With the help of advanced packaging technologies to integrate multiple chips (eg, CPU, AI,
IO), a chiplet-based SoC design process can enable fast system construction. However, the …
IO), a chiplet-based SoC design process can enable fast system construction. However, the …
Pitstop: Enabling a virtual network free network-on-chip
Maintaining correctness is of paramount importance in the design of a computer system.
Within a multiprocessor interconnection network, correctness is guaranteed by having …
Within a multiprocessor interconnection network, correctness is guaranteed by having …
Si-Kintsugi: Towards Recovering Golden-Like Performance of Defective Many-Core Spatial Architectures for AI
The growing demand for higher compute and memory capacity driven by artificial
intelligence (AI) applications pushes higher core counts in modern systems. Many-core …
intelligence (AI) applications pushes higher core counts in modern systems. Many-core …
Determining the Minimum Number of Virtual Networks for Different Coherence Protocols
We revisit the question of how many virtual networks (VNs) are required to provably avoid
deadlock in a cache coherence protocol. The textbook way of reasoning about VNs says that …
deadlock in a cache coherence protocol. The textbook way of reasoning about VNs says that …
Stay in your lane: A noc with low-overhead multi-packet bypassing
NoCs are over-provisioned with large virtual channels to provide deadlock freedom and
performance improvement. This use of virtual channels leads to considerable power and …
performance improvement. This use of virtual channels leads to considerable power and …
RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel
D Xu, Y Ouyang, W Zhou, Z Huang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
As chip fabrication has advanced to the nano level, the increased link density has
heightened the risk of failures. The potential performance drawbacks resulting from these …
heightened the risk of failures. The potential performance drawbacks resulting from these …
SEEC: Stochastic escape express channel
Allocating a free buffer before moving to the next router is a fundamental tenet for packet
movement in NoCs. Often, to solve head of line blocking and avoid deadlock, NoCs are …
movement in NoCs. Often, to solve head of line blocking and avoid deadlock, NoCs are …
Aggressive fine-grained power gating of noc buffers
Power gating is effective for networks-on-chip (NoCs) to reduce the excessive leakage
power dissipated by idle network components. Most existing NoC power-gating approaches …
power dissipated by idle network components. Most existing NoC power-gating approaches …