In-memory computing with resistive memory circuits: Status and outlook
In-memory computing (IMC) refers to non-von Neumann architectures where data are
processed in situ within the memory by taking advantage of physical laws. Among the …
processed in situ within the memory by taking advantage of physical laws. Among the …
FracBNN: Accurate and FPGA-efficient binary neural networks with fractional activations
Binary neural networks (BNNs) have 1-bit weights and activations. Such networks are well
suited for FPGAs, as their dominant computations are bitwise arithmetic and the memory …
suited for FPGAs, as their dominant computations are bitwise arithmetic and the memory …
Training an ising machine with equilibrium propagation
Ising machines, which are hardware implementations of the Ising model of coupled spins,
have been influential in the development of unsupervised learning algorithms at the origins …
have been influential in the development of unsupervised learning algorithms at the origins …
Training deep Boltzmann networks with sparse Ising machines
The increasing use of domain-specific computing hardware and architectures has led to an
increasing demand for unconventional computing approaches. One such approach is the …
increasing demand for unconventional computing approaches. One such approach is the …
Learning automata based energy-efficient AI hardware design for IoT applications
Energy efficiency continues to be the core design challenge for artificial intelligence (AI)
hardware designers. In this paper, we propose a new AI hardware architecture targeting …
hardware designers. In this paper, we propose a new AI hardware architecture targeting …
Experimental demonstration of multilevel resistive random access memory programming for up to two months stable neural networks inference accuracy
Crossbars of resistive memories, or memristors, provide a road to reduce the energy
consumption of artificial neural networks, by naturally implementing multiply accumulate …
consumption of artificial neural networks, by naturally implementing multiply accumulate …
Stochastic computing in convolutional neural network implementation: A review
YY Lee, ZA Halim - PeerJ Computer Science, 2020 - peerj.com
Stochastic computing (SC) is an alternative computing domain for ubiquitous deterministic
computing whereby a single logic gate can perform the arithmetic operation by exploiting the …
computing whereby a single logic gate can perform the arithmetic operation by exploiting the …
STT-BSNN: An in-memory deep binary spiking neural network based on STT-MRAM
This paper proposes an in-memory binary spiking neural network (BSNN) based on spin-
transfer-torque magnetoresistive RAM (STT-MRAM). We propose residual BSNN learning …
transfer-torque magnetoresistive RAM (STT-MRAM). We propose residual BSNN learning …
Reliable binarized neural networks on unreliable beyond von-neumann architecture
Specialized hardware accelerators beyond von-Neumann, that offer processing capability in
where the data resides without moving it, become inevitable in data-centric computing …
where the data resides without moving it, become inevitable in data-centric computing …
Binarized snns: Efficient and error-resilient spiking neural networks through binarization
Spiking Neural Networks (SNNs) are considered the third generation of NNs and can reach
similar accuracy as conventional deep NNs, but with a considerable improvement in …
similar accuracy as conventional deep NNs, but with a considerable improvement in …