{DeepHammer}: Depleting the intelligence of deep neural networks through targeted chain of bit flips
Security of machine learning is increasingly becoming a major concern due to the
ubiquitous deployment of deep learning in many security-sensitive domains. Many prior …
ubiquitous deployment of deep learning in many security-sensitive domains. Many prior …
Powspectre: Powering up speculation attacks with tsx-based replay
Trusted execution environment (TEE) offers data protection against malicious system
software. However, the TEE (eg, Intel SGX) threat model exacerbates information leakage as …
software. However, the TEE (eg, Intel SGX) threat model exacerbates information leakage as …
A survey on cache timing channel attacks for multicore processors
Cache timing channel attacks has attained a lot of attention in the last decade. These attacks
exploits the timing channel created by the significant time gap between cache and main …
exploits the timing channel created by the significant time gap between cache and main …
Leaking secrets through modern branch predictors in the speculative world
Transient execution attacks that exploit speculation have raised significant concerns in
computer systems. Typically, branch predictors are leveraged to trigger mis-speculation in …
computer systems. Typically, branch predictors are leveraged to trigger mis-speculation in …
Cotsknight: Practical defense against cache timing channel attacks using cache monitoring and partitioning technologies
F Yao, H Fang, M Doroslovački… - … Oriented Security and …, 2019 - ieeexplore.ieee.org
Recent studies have shown how adversaries can exploit hardware cache structures to
launch information leakage-based attacks. Among these attacks, timing channels are …
launch information leakage-based attacks. Among these attacks, timing channels are …
[PDF][PDF] Ceviche: Capability-Enhanced Secure Virtualization of Caches
Modern systems make extensive use of resource virtualization to achieve high hardware
utilization and minimize the total cost of ownership. However, sharing of physical resources …
utilization and minimize the total cost of ownership. However, sharing of physical resources …
MetaLeak: Uncovering Side Channels in Secure Processor Architectures Exploiting Metadata
Microarchitectural side channels raise severe security concerns. Recent studies indicate that
microarchitecture security should be examined holistically (rather than separately) in …
microarchitecture security should be examined holistically (rather than separately) in …
WRITE+ SYNC: Software Cache Write Covert Channels Exploiting Memory-disk Synchronization
Memory-disk synchronization is a critical technology for ensuring data correctness, integrity,
and security, especially in systems that handle sensitive information like financial …
and security, especially in systems that handle sensitive information like financial …
Attack directories on Arm big. LITTLE processors
Eviction-based cache side-channel attacks take advantage of inclusive cache hierarchies
and shared cache hardware. Processors with the template ARM big. LITTLE architecture do …
and shared cache hardware. Processors with the template ARM big. LITTLE architecture do …