LETAM: A low energy truncation-based approximate multiplier
In this paper, we propose an energy efficient approximate multiplier design obtained by
truncating the input operands. In the structure, the n-bit multiplication operation is …
truncating the input operands. In the structure, the n-bit multiplication operation is …
Low power and area efficient error tolerant adder for image processing application
Approximate computing‐based arithmetic units are oriented towards reduction in power,
delay, and area. Intrinsic error tolerance capability of emerging application domains, like …
delay, and area. Intrinsic error tolerance capability of emerging application domains, like …
An error efficient and low complexity approximate multi‐bit adder for image processing applications
M Priyadharshni, A Raj Gupta… - … Journal of Circuit …, 2021 - Wiley Online Library
Approximate computing‐based hardware is directed towards reduction in area and power
consumption; it finds better suitability in various image processing applications. In order to …
consumption; it finds better suitability in various image processing applications. In order to …
High speed error tolerant adder for multimedia applications
S Geetha, P Amritvalli - Journal of Electronic Testing, 2017 - Springer
In this paper, a 1-bit modified full adder (MFA) cell is proposed. This eliminates the carry
propagation during the addition by allowing errors in the carry bit. Using the proposed MFA …
propagation during the addition by allowing errors in the carry bit. Using the proposed MFA …
Evolutionary algorithms in approximate computing: A survey
L Sekanina - arxiv preprint arxiv:2108.07000, 2021 - arxiv.org
In recent years, many design automation methods have been developed to routinely create
approximate implementations of circuits and programs that show excellent trade-offs …
approximate implementations of circuits and programs that show excellent trade-offs …
Efficient arithmetic error rate calculus for visibility reduced approximate adders
In this letter, we present a novel methodology to calculate the arithmetic error rate (AER) for
deterministic approximate adder architectures, where the calculation of each output bit is …
deterministic approximate adder architectures, where the calculation of each output bit is …
Approximate conditional carry adder for error tolerant applications
Conditional carry adder has the advantage of best delay characteristics compared to other
fast adders. This article presents approximate models of conditional carry adder (CCA) …
fast adders. This article presents approximate models of conditional carry adder (CCA) …
[PDF][PDF] On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks
JA Echavarria Gutiérrez - 2022 - opus4.kobv.de
Approximate computing exploits perceptual inaccuracies of the human senses, error-
resilient applications, and noisy input data to produce more power-efficient architectures …
resilient applications, and noisy input data to produce more power-efficient architectures …
AxLEAP: Enabling Low-Power Approximations Through Unified Power Format
Approximate Computing aims at achieving better performance at a marginal loss of accuracy
in error-resilient applications. Several approximate arithmetic circuits have been proposed in …
in error-resilient applications. Several approximate arithmetic circuits have been proposed in …
On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks
JAE Gutiérrez - 2022 - search.proquest.com
Approximate computing exploits perceptual inaccuracies of the human senses, error-
resilient applications, and noisy input data to produce more power-efficient architectures …
resilient applications, and noisy input data to produce more power-efficient architectures …