Machine learning for yield learning and optimization
Yield learning and optimization are critical for advanced IC design and manufacturing.
Recent advance in machine learning has brought a lot of new opportunities in improving the …
Recent advance in machine learning has brought a lot of new opportunities in improving the …
Fast and expandable ANN-based compact model and parameter extraction for emerging transistors
In this paper, we present a fast and expandable artificial neural network (ANN)-based
compact model and parameter extraction flow to replace the existing complicated compact …
compact model and parameter extraction flow to replace the existing complicated compact …
Towards decrypting the art of analog layout: Placement quality prediction via transfer learning
Despite tremendous efforts in analog layout automation, little adoption has been
demonstrated in practical design flows. Traditional analog layout synthesis tools use various …
demonstrated in practical design flows. Traditional analog layout synthesis tools use various …
Lithography hotspot detection: From shallow to deep learning
As VLSI technology nodes continue, the gap between lithography system manufacturing
ability and transistor feature size induces serious problems, thus lithography hotspot …
ability and transistor feature size induces serious problems, thus lithography hotspot …
A hierarchical performance equation library for basic op-amp design
I Abel, M Neuner, HE Graeb - IEEE Transactions on Computer …, 2021 - ieeexplore.ieee.org
This article presents a new approach to automate the setup of the design equations of the
manual analog design process. Its main contribution is a comprehensive hierarchical …
manual analog design process. Its main contribution is a comprehensive hierarchical …
Design-phase buffer allocation for post-silicon clock binning by iterative learning
At submicrometer manufacturing technology nodes, process variations affect circuit
performance significantly. To counter these variations, engineers are reserving more timing …
performance significantly. To counter these variations, engineers are reserving more timing …
Modeling the dependency of analog circuit performance parameters on manufacturing process variations with applications in sensitivity analysis and yield prediction
There is a consistent dependence between integrated circuits (ICs) performance parameters
and manufacturing process variations and capturing it at an early development phase …
and manufacturing process variations and capturing it at an early development phase …
Massive multisite variability-aware die distribution estimation for analog/mixed-signal circuits test validation
Massive multisite testing significantly reduces test cost and immensely increases production
throughput by simultaneously screening multiple devices under test (DUTs). However, non …
throughput by simultaneously screening multiple devices under test (DUTs). However, non …
Efficient hierarchical performance modeling for integrated circuits via bayesian co-learning
With the continuous drive towards integrated circuits scaling, efficient performance modeling
is becoming more crucial yet, more challenging. In this paper, we propose a novel method of …
is becoming more crucial yet, more challenging. In this paper, we propose a novel method of …
Efficient hierarchical performance modeling for analog and mixed-signal circuits via bayesian co-learning
With the continuous drive toward integrated circuits scaling, efficient performance modeling
is becoming more crucial yet more challenging. In this paper, we propose a novel method of …
is becoming more crucial yet more challenging. In this paper, we propose a novel method of …