Turnitin
降AI改写
早检测系统
早降重系统
Turnitin-UK版
万方检测-期刊版
维普编辑部版
Grammarly检测
Paperpass检测
checkpass检测
PaperYY检测
Hyperspectral image super-resolution via non-local sparse tensor factorization
Hyperspectral image (HSI) super-resolution, which fuses a low-resolution (LR) HSI with a
high-resolution (HR) multispectral image (MSI), has recently attracted much attention. Most …
high-resolution (HR) multispectral image (MSI), has recently attracted much attention. Most …
Implementing asynchronous circuits on LUT based FPGAs
This paper describes a general methodology to rapidly prototype asynchronous circuits on
LUT based FPGAs. The main objective is to offer designers the powerfulness of standard …
LUT based FPGAs. The main objective is to offer designers the powerfulness of standard …
Lane detection method based on improved RANSAC algorithm
J Guo, Z Wei, D Miao - 2015 IEEE Twelfth International …, 2015 - ieeexplore.ieee.org
Lane detection based on computer vision is a key technology of Automatic Drive System for
intelligent vehicles. In this paper, we propose a real-time and efficient lane detection …
intelligent vehicles. In this paper, we propose a real-time and efficient lane detection …
Asynchronous FPGA architectures
R Payne - IEE Proceedings-Computers and Digital Techniques, 1996 - IET
Field programmable gate arrays (FPGAs) are of increasing importance as processor support
devices, and as computational devices in their only right. Current synchronous FPGA …
devices, and as computational devices in their only right. Current synchronous FPGA …
Self-timed FPGA systems
R Payne - International Workshop on Field Programmable Logic …, 1995 - Springer
Recently, there has been a renewal of interest in self-timed systems, due to their modularity,
robustness, low-power consumption and average-case performance. Additionally, this paper …
robustness, low-power consumption and average-case performance. Additionally, this paper …
Globally asynchronous locally synchronous FPGA architectures
Abstract Globally Asynchronous Locally Synchronous (GALS) Systems have provoked
renewed interest over recent years as they have the potential to combine the benefits of …
renewed interest over recent years as they have the potential to combine the benefits of …
General approach to asynchronous circuits simulation using synchronous fpgas
Using field-programmable gate arrays (FPGAs) for software and hardware verification and
development is a standard step in the digital application-specific integrated circuits (ASICs) …
development is a standard step in the digital application-specific integrated circuits (ASICs) …
[BOK][B] A Data-Driven Multiprocessor Architecture for High Throughput Digital Signal Processing
AKW Yeung - 1995 - search.proquest.com
A data-driven multiprocessor architecture called PADDI-2 specially designed for rapid
prototy** of high throughput digital signal processing algorithms is presented …
prototy** of high throughput digital signal processing algorithms is presented …
[PDF][PDF] Self-timed field programmmable gate array architectures.
R Payne - 1997 - core.ac.uk
Dynamic hardware systems exploit the in-system reconfigurability of Field Programmable
Gate Arrays (FPGAs), but are currently limited by the delay properties of synchronous FPGA …
Gate Arrays (FPGAs), but are currently limited by the delay properties of synchronous FPGA …
Low latency self-timed flow-through FIFOs
E Brunvand - … Sixteenth Conference on Advanced Research in …, 1995 - ieeexplore.ieee.org
Self-timed flow-through FIFOs are constructed easily using only a single C-element as
control for each stage of the FIFO. Throughput can be very high in this type of FIFO as the …
control for each stage of the FIFO. Throughput can be very high in this type of FIFO as the …