Trending IC design directions in 2022

CH Chan, L Cheng, W Deng, P Feng… - Journal of …, 2022 - iopscience.iop.org
For the non-stop demands for a better and smarter society, the number of electronic devices
keeps increasing exponentially; and the computation power, communication data rate, smart …

Research progress on low-power artificial intelligence of things (AIoT) chip design

L Ye, Z Wang, T Jia, Y Ma, L Shen, Y Zhang… - Science China …, 2023 - Springer
An artificial intelligence of things (AIoT) chip is a critical hardware component in edge
devices that supports data acquisition and processing in the artificial intelligence (AI) era. In …

A 47nW mixed-signal voice activity detector (VAD) featuring a non-volatile capacitor-ROM, a short-time CNN feature extractor and an RNN classifier

J Lin, KF Un, WH Yu, PI Mak… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
Real-time speech recognizers and translators rely on an always-on voice activity detector
(VAD) to enable and disable the main system for effective power savings. A feature extractor …

A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM

J Lin, KF Un, WH Yu, RP Martins… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
This article reports an area-and-power-efficient voice activity detector (VAD) for voice-control
edge devices. It innovates a short-time convolutional neural network (ST-CNN) and a …

A 108-nW 0.8-mm2 Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS

F Chen, KF Un, WH Yu, PI Mak… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article reports a passive analog feature extractor for realizing an area-and-power-
efficient voice activity detector (VAD) for voice-control edge devices. It features a switched …

A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell

H Zhang, WH Yu, Z Yang, KF Un, J Yin… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article presents an energy-harvester-powered ultra-low power (ULP) vibration-based
condition monitoring (VbCM) chip with a digital compute-in-memory (CIM)-based deep …

IVATS: A Leakage Reduction Technique Based on Input Vector Analysis and Transistor Stacking in CMOS Circuits

L Deng, K Li, W Shan - 2023 IEEE International Symposium on …, 2023 - ieeexplore.ieee.org
Leakage reduction is crucial for always-on IoT applications in which static power
consumption of the memory cells accounts for a large proportion of the total power. Even …

33.7 An Adhesive Interposer-Based Reconfigurable Multi-Sensor Patch Interface with On-Chip Application Tunable Time-Domain Feature Extraction

J Cho, YJ Pyeon, J Yeom, H Kim, S Cho… - … Solid-State Circuits …, 2024 - ieeexplore.ieee.org
Heterogeneous multi-sensor patch devices should meet the requirements of various
applications, and an adhesive interposer-based patch concept with integrated microscale …

Design and implementation of a low power switched-capacitor-based analog feature extractor for voice keyword spotting

F Chen, KF Un, WH Yu, PI Mak… - 2022 IEEE Asia Pacific …, 2022 - ieeexplore.ieee.org
A low-power keyword spotting (KWS) is demanding for the smart human-device interface.
The conventional analog feature extractor utilizes an analog filter bank that consumes large …

A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization

G **n, F Tan, J Li, J Chen, WH Yu, KF Un… - 2024 IEEE 67th …, 2024 - ieeexplore.ieee.org
Analog computing-in-memory (CIM) macro has been widely used in various machine
learning (ML) applications, which parallelly perform energy-and area-efficient matrix-vector …