Time Moore: Exploiting Moore's Law from the perspective of time
L **u - IEEE Solid-State Circuits Magazine, 2019 - ieeexplore.ieee.org
Moore's law has served as a goal for the semiconductor industry for more than 50 years.
After decades of relentlessly racing forward, convincing new evidence now shows that the …
After decades of relentlessly racing forward, convincing new evidence now shows that the …
Direct all-digital frequency synthesis techniques, spurs suppression, and deterministic jitter correction
PP Sotiriadis, K Galanopoulos - IEEE Transactions on Circuits …, 2012 - ieeexplore.ieee.org
Direct all-digital frequency synthesizers are favored by modern nanoscale CMOS
technologies but suffer from strong frequency spurs and timing irregularities. To counter …
technologies but suffer from strong frequency spurs and timing irregularities. To counter …
A low-power digital DLL-based clock generator in open-loop mode
B Mesgarzadeh, A Alvandpour - IEEE Journal of Solid-State …, 2009 - ieeexplore.ieee.org
This paper presents a low-power digital DLL-based clock generator. Once the DLL is locked,
it operates in open-loop mode to reduce deterministic clock jitter and the power dissipation …
it operates in open-loop mode to reduce deterministic clock jitter and the power dissipation …
A self-calibrating delay-locked delay line with shunt-capacitor circuit scheme
This paper describes a CMOS 32-tap delay-locked delay line, realized with a shunt-
capacitor circuit scheme, with an on-chip calibration circuit that allows the on-field reduction …
capacitor circuit scheme, with an on-chip calibration circuit that allows the on-field reduction …
Spurs-free single-bit-output all-digital frequency synthesizers with forward and feedback spurs and noise cancellation
PP Sotiriadis - IEEE Transactions on Circuits and Systems I …, 2016 - ieeexplore.ieee.org
All-digital frequency synthesis architectures with phase and polar Σ-Δ modulation feedback
loops are introduced as a means to overcome the inherent spectral-quality limitations of …
loops are introduced as a means to overcome the inherent spectral-quality limitations of …
Theory of flying-adder frequency synthesizers—Part I: modeling, signals' periods and output average frequency
PP Sotiriadis - IEEE Transactions on Circuits and Systems I …, 2010 - ieeexplore.ieee.org
This is a rigorous mathematical theory of the operation of the flying-adder (FA) frequency
synthesizer (also called direct digital period synthesizer). The paper consists of two parts …
synthesizer (also called direct digital period synthesizer). The paper consists of two parts …
Theory of flying-adder frequency synthesizers—Part II: Time-and frequency-domain properties of the output signal
PP Sotiriadis - IEEE Transactions on Circuits and Systems I …, 2010 - ieeexplore.ieee.org
This is a rigorous mathematical theory of the operation of the flying-adder (FA) frequency
synthesizer (also called direct digital period synthesizer). The paper consists of two parts …
synthesizer (also called direct digital period synthesizer). The paper consists of two parts …
Single-bit all-digital frequency synthesis using homodyne sigma-delta modulation
PP Sotiriadis - IEEE transactions on ultrasonics, ferroelectrics …, 2016 - ieeexplore.ieee.org
All-digital frequency synthesis using bandpass sigma-delta modulation to achieve spectrally
clean single-bit output is presented and mathematically analyzed resulting in a complete …
clean single-bit output is presented and mathematically analyzed resulting in a complete …
A digital frequency synthesizer for cognitive radio spectrum sensing applications
T Rapinoja, K Stadius, L Xu, S Lindfors… - IEEE Transactions …, 2010 - ieeexplore.ieee.org
This paper presents a wideband digital frequency synthesizer architecture targeted for
spectrum sensing applications. The proposed frequency synthesizer architecture is based …
spectrum sensing applications. The proposed frequency synthesizer architecture is based …
Measurement of delay mismatch due to process variations by means of modified ring oscillators
B Zhou, A Khouas - 2005 IEEE International Symposium on …, 2005 - ieeexplore.ieee.org
A novel and effective test circuit to measure cell-to-cell delay mismatch due to process
variations is presented. A fully digital control circuit that efficiently realizes the technique is …
variations is presented. A fully digital control circuit that efficiently realizes the technique is …