Review of printed-circuit-board level EMI/EMC issues and tools

B Archambeault, C Brench… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
A comprehensive review of printed circuit board (PCB) electromagnetic compatibility (EMC)
issues, analysis techniques, and possible solutions would fill a large book or more. This …

Overview of power integrity solutions on package and PCB: Decoupling and EBG isolation

TL Wu, HH Chuang, TK Wang - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
Mitigating power distribution network (PDN) noise is one of the main efforts for power
integrity (PI) design in high-speed or mixed-signal circuits. Possible solutions, which are …

Deep reinforcement learning-based optimal decoupling capacitor design method for silicon interposer-based 2.5-D/3-D ICs

H Park, J Park, S Kim, K Cho, D Lho… - IEEE Transactions …, 2020 - ieeexplore.ieee.org
In this article, we first propose a deep reinforcement learning (RL)-based optimal decoupling
capacitor (decap) design method for silicon interposer-based 2.5-D/3-D integrated circuits …

[BUCH][B] Modeling and design of electromagnetic compatibility for high-speed printed circuit boards and packaging

XC Wei - 2017 - taylorfrancis.com
Modeling and Design of Electromagnetic Compatibility for High-Speed Printed Circuit
Boards and Packaging presents the electromagnetic modelling and design of three major …

PCB EMC design guidelines: a brief annotated list

T Hubing - 2003 IEEE Symposium on Electromagnetic …, 2003 - ieeexplore.ieee.org
Some of the worst printed circuit board design choices are made by engineers who are
trying to comply with a list of EMC design guidelines. Nevertheless, a short list of design …

An efficient approach for power delivery network design with closed-form expressions for parasitic interconnect inductances

C Wang, J Mao, G Selli, S Luan, L Zhang… - IEEE Transactions …, 2006 - ieeexplore.ieee.org
Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills
for power and return, involves the distributed behavior of the power/ground planes and the …

Multipin optimization method for placement of decoupling capacitors using a genetic algorithm

I Erdin, R Achar - IEEE Transactions on Electromagnetic …, 2018 - ieeexplore.ieee.org
A genetic algorithm (GA)-based method is proposed for simultaneous optimization of
decoupling capacitors assigned to multiple pins of a ball-grid array (BGA) package on a …

Jitter-aware economic pdn optimization with a genetic algorithm

Z Xu, Z Wang, Y Sun, C Hwang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
This article proposes a jitter-aware decoupling capacitors placement optimization method
that uses the genetic algorithm (GA). A novel method for defining the optimization target …

Decoupling capacitor placement in power delivery networks using MFEM

JY Choi, M Swaminathan - IEEE Transactions on Components …, 2011 - ieeexplore.ieee.org
The impedance of the power distribution network (PDN) needs to be minimized in order to
prevent unwanted voltage fluctuations at frequencies where current transients occur. To …

Parameter optimization of laser drilling for through-glass vias based on deep learning and Bayesian algorithm

Y Ouyang, D Hou, T Lv, F Dong, S Liu… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
In the semiconductor industry, especially in the manufacturing of through-glass vias (TGVs),
there is an increasing need to improve the quality and efficiency of manufacturing …