As the number of on-chip cores and memory demands of applications increase, judicious
management of cache resources has become not merely attractive but imperative. Cache …

This paper investigates the problem of partitioning a shared cache between multiple
concurrently executing applications. The commonly used LRU policy implicitly partitions a …

A significant part of future microprocessor real estate will be dedicated to 12 or 13 caches.
These on-chip caches will heavily impact processor performance, power dissipation, and …

Increases in on-chip communication delay and the large working sets of server and scientific
workloads complicate the design of the on-chip last-level cache for multicore processors …

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from
the large TCO investment. Emerging applications (eg, data serving and web search) that run …

This paper presents and studies a distributed L2 cache management approach through OS-
level page allocation for future many-core processors. L2 cache management is a crucial …

Based on current trends, multicore processors will have 1000 cores or more within the next
decade. However, their promise of increased performance will only be realized if their …

We propose an organization for the on-chip memory system of a chip multiprocessor, in
which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized …

This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources
among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a …

The large working sets of commercial and scientific workloads stress the L2 caches of chip
multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache …