A multi-state model for transmission system resilience enhancement against short-circuit faults caused by extreme weather events

C Guo, C Ye, Y Ding, P Wang - IEEE Transactions on Power …, 2020 - ieeexplore.ieee.org
Due to global climate change, the effect of extreme weather on power systems has attracted
extensive attention. In the prior-art grid resilience studies, the hurricanes or wildfires are …

An aging-resistant RO-PUF for reliable key generation

MT Rahman, F Rahman, D Forte… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Physical unclonable functions (PUFs) have emerged as a promising security primitive for
low-cost authentication and cryptographic key generation. However, PUF stability with …

Self-tuning for maximized lifetime energy-efficiency in the presence of circuit aging

E Mintarno, J Skaf, R Zheng… - … on Computer-Aided …, 2011 - ieeexplore.ieee.org
This paper presents an integrated framework, together with control policies, for optimizing
dynamic control of self-tuning parameters of a digital system over its lifetime in the presence …

Workload dependent NBTI and PBTI analysis for a sub-45nm commercial microprocessor

E Mintarno, V Chandra, D Pietromonaco… - 2013 IEEE …, 2013 - ieeexplore.ieee.org
This paper analyzes aging effects on various design hierarchies of a sub-45nm commercial
processor running realistic applications. Dependencies of aging effects on switching-activity …

Robust system design to overcome CMOS reliability challenges

S Mitra, K Brelsford, YM Kim… - IEEE Journal on …, 2011 - ieeexplore.ieee.org
Today's mainstream electronic systems typically assume that transistors and interconnects
operate correctly over their useful lifetime. With enormous complexity and significantly …

An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applications

S Khan, AP Shah, N Gupta, SS Chouhan… - Microelectronics …, 2019 - Elsevier
Abstract Physically Unclonable Functions (PUF) have emerged as security primitives which
can generate high entropy, temper resilient bits for security applications. However, the …

Testing for transistor aging

AH Baba, S Mitra - 2009 27th IEEE VLSI Test Symposium, 2009 - ieeexplore.ieee.org
Transistor aging results in circuit delay degradation over time, and is a growing concern for
future systems. On-line circuit failure prediction, together with on-line self-test, can overcome …

Aging benefits in nanometer CMOS designs

D Rossi, V Tenentes, S Yang… - … on Circuits and …, 2016 - ieeexplore.ieee.org
In this brief, we show that bias temperature instability (BTI) aging of MOS transistors,
together with its detrimental effect for circuit performance and lifetime, presents considerable …

Low cost NBTI degradation detection and masking approaches

M Omaña, D Rossi, N Bosio… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Performance degradation of integrated circuits due to aging effects, such as Negative Bias
Temperature Instability (NBTI), is becoming a great concern for current and future CMOS …

Impact of bias temperature instability on soft error susceptibility

D Rossi, M Omaña, C Metra… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
In this paper, we address the issue of analyzing the effects of aging mechanisms on ICs' soft
error (SE) susceptibility. In particular, we consider bias temperature instability (BTI), namely …