Reliability is becoming a major concern in Networks-on-Chips (NoCs) design. Several
techniques have been proposed in the literature to deal with different types of faults at …

The network-on-chip (NoC) technology is frequently referred to as a front-end solution to a
back-end problem. The physical substructure that transfers data on the chip and ensures the …

Asignificant rise in Artificial Intelligence (AI) has impacted many applications around us, so
much so that AI has now been increasingly used in safety-critical applications. AI at the edge …

Nowadays, static power consumption in chip multiprocessor (CMP) is the most crucial
concern of chip designers. Power-gating is an effective approach to mitigate static power …

Network-on-chip (NoC) is a communication intellectual property (IP) core, popularly used in
the system-on-a-chip (SoC) designs. The NoC IP core often comes from an untrusted 3rd …

To maximize the performance and energy efficiency of Spiking Neural Network (SNN)
processing on resource-constrained embedded systems, specialized hardware …

The first-generation of BrainScaleS, also referred to as BrainScaleS-1, is a neuromorphic
system for emulating large-scale networks of spiking neurons. Following a'physical …

Application specific Network on Chip (NoC) designs are quickly becoming the technology of
choice for solving the problem of multiprocessor system architecture. Broadband, interposes …

With the advent of rapidly evolving nanoelectronic systems, compact implementation of
versatile and dense network-on-chips (NoCs) on a die has emerged as technology-of …

Aggressive scaling in deep nanometer technology enables chip multiprocessor design
facilitated by the communication-centric architecture provided by Network-on-Chip (NoC). At …