Rtlcoder: Outperforming gpt-3.5 in design rtl generation with our open-source dataset and lightweight solution

S Liu, W Fang, Y Lu, Q Zhang… - 2024 IEEE LLM Aided …, 2024 - ieeexplore.ieee.org
The automatic generation of RTL code (eg, Verilog) using natural language instructions and
large language models (LLMs) has attracted significant research interest recently. However …

Llm for soc security: A paradigm shift

D Saha, S Tarek, K Yahyaei, SK Saha, J Zhou… - IEEE …, 2024 - ieeexplore.ieee.org
As the ubiquity and complexity of system-on-chip (SoC) designs increase across electronic
devices, incorporating security into an SoC design flow poses significant challenges …

Llms and the future of chip design: Unveiling security risks and building trust

Z Wang, L Alrahis, L Mankali, J Knechtel… - 2024 IEEE Computer …, 2024 - ieeexplore.ieee.org
Chip design is about to be revolutionized by the integration of large language, multimodal,
and circuit models (collectively LxMs). While exploring this exciting frontier with tremendous …

Assertllm: Generating and evaluating hardware verification assertions from design specifications via multi-llms

W Fang, M Li, M Li, Z Yan, S Liu, Z **e… - arxiv preprint arxiv …, 2024 - arxiv.org
Assertion-based verification (ABV) is a critical method for ensuring design circuits comply
with their architectural specifications, which are typically described in natural language. This …

[HTML][HTML] The potential of llms in hardware design

S Alsaqer, S Alajmi, I Ahmad, M Alfailakawi - Journal of Engineering …, 2024 - Elsevier
The unprecedented success of Large Language Models (LLMs) like ChatGPT across
diverse domains such as natural language understanding and coding has paved the way for …

Llm4eda: Emerging progress in large language models for electronic design automation

R Zhong, X Du, S Kai, Z Tang, S Xu, HL Zhen… - arxiv preprint arxiv …, 2023 - arxiv.org
Driven by Moore's Law, the complexity and scale of modern chip design are increasing
rapidly. Electronic Design Automation (EDA) has been widely applied to address the …

Origen: Enhancing rtl code generation with code-to-code augmentation and self-reflection

F Cui, C Yin, K Zhou, Y **ao, G Sun, Q Xu… - arxiv preprint arxiv …, 2024 - arxiv.org
Recent studies have demonstrated the significant potential of Large Language Models
(LLMs) in generating Register Transfer Level (RTL) code, with notable advancements …

New solutions on LLM acceleration, optimization, and application

Y Huang, LJ Wan, H Ye, M Jha, J Wang, Y Li… - Proceedings of the 61st …, 2024 - dl.acm.org
Large Language Models (LLMs) have revolutionized a wide range of applications with their
strong human-like understanding and creativity. Due to the continuously growing model size …

RTLCoder: Fully open-source and efficient LLM-assisted RTL code generation technique

S Liu, W Fang, Y Lu, J Wang, Q Zhang… - … on Computer-Aided …, 2024 - ieeexplore.ieee.org
The automatic generation of RTL code (eg, Verilog) using natural language instructions and
large language models (LLMs) has attracted significant research interest recently. However …

Autobench: Automatic testbench generation and evaluation using llms for hdl design

R Qiu, GL Zhang, R Drechsler… - Proceedings of the 2024 …, 2024 - dl.acm.org
In digital circuit design, testbenches (TBs) constitute the cornerstone of simulation-based
hardware verification. Traditional methodologies for testbench generation during simulation …