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An efficient algorithm for finding the k longest testable paths through each gate in a combinational circuit
W Qiu, DMH Walker - … Test Conference, 2003. Proceedings. ITC 2003 …, 2003 - computer.org
In this paper we describe a method for indexing and retrieval of multimedia data based on
annotation and segmentation. Our goal is the retrieval of segments of audio and video …
annotation and segmentation. Our goal is the retrieval of segments of audio and video …
A neural network application for bankruptcy prediction
W Raghupathi, LL Schkade… - Proceedings of the twenty …, 1991 - ieeexplore.ieee.org
Discusses an application of the back error propagation network for making bankruptcy
prediction decisions. Results of simulations with one and two hidden layers with varying …
prediction decisions. Results of simulations with one and two hidden layers with varying …
A simulator of small-delay faults caused by resistive-open defects
A Czutro, N Houarche, P Engelke… - 2008 13th European …, 2008 - ieeexplore.ieee.org
We present a simulator which determines the coverage of small-delay faults, ie, delay faults
with a size below one clock cycle, caused by resistive-open defects. These defects are likely …
with a size below one clock cycle, caused by resistive-open defects. These defects are likely …
Parallel X-fault simulation with critical path tracing technique
In this paper, a new very fast fault simulation method to handle the X-fault model is
proposed. The method is based on a two-phase procedure. In the first phase, a parallel …
proposed. The method is based on a two-phase procedure. In the first phase, a parallel …
Testing for systematic defects based on DFM guidelines
D Kim, ME Amyeen, S Venkataraman… - 2007 IEEE …, 2007 - ieeexplore.ieee.org
With shrinking feature sizes of manufacturing processes, the occurrence of systematic
defects is expected to increase. In this paper, we present techniques for identifying potential …
defects is expected to increase. In this paper, we present techniques for identifying potential …
Dynamic voltage scaling aware delay fault testing
The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have
a detrimental impact on the quality of manufacturing tests employed to detect permanent …
a detrimental impact on the quality of manufacturing tests employed to detect permanent …
A content-based image retrieval system based on Hadoop and Lucene
This paper introduces a content-based image retrieval (CBIR) system based on Hadoop and
Lucene. Hadoop is a kind of open source software with powerful parallelization and …
Lucene. Hadoop is a kind of open source software with powerful parallelization and …
Defect modeling using fault tuples
RD Blanton, KN Dwarakanath… - IEEE Transactions on …, 2006 - ieeexplore.ieee.org
Fault tuples represent a defect modeling mechanism capable of capturing the logical
misbehavior of arbitrary defects in digital circuits. To justify this claim, this paper describes …
misbehavior of arbitrary defects in digital circuits. To justify this claim, this paper describes …
Experimental analysis of NBTI effects on QDI circuits with resistive bridging faults
Abstract Detecting defects in Delay-Insensitive Circuits (DIC), particularly for clockless
asynchronous circuits, poses a major challenge. Traditional testing methods are complex …
asynchronous circuits, poses a major challenge. Traditional testing methods are complex …
Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits
In this paper, a new very fast fault simulation method for extended class of faults is proposed.
The method is based on a two-phase procedure. In the first phase, a novel parallel exact …
The method is based on a two-phase procedure. In the first phase, a novel parallel exact …