A comprehensive review of convolutional neural networks for defect detection in industrial applications

R Khanam, M Hussain, R Hill, P Allen - IEEE Access, 2024 - ieeexplore.ieee.org
Quality inspection and defect detection remain critical challenges across diverse industrial
applications. Driven by advancements in Deep Learning, Convolutional Neural Networks …

[HTML][HTML] Sustainable machine vision for industry 4.0: a comprehensive review of convolutional neural networks and hardware accelerators in computer vision

M Hussain - AI, 2024 - mdpi.com
As manifestations of Industry 4.0. become visible across various applications, one key and
opportune area of development are quality inspection processes and defect detection. Over …

Smappic: Scalable multi-fpga architecture prototype platform in the cloud

G Chirkov, D Wentzlaff - Proceedings of the 28th ACM International …, 2023 - dl.acm.org
Traditionally, architecture prototypes are built on top of FPGA infrastructure, with two
associated problems. First, very large FPGAs are prohibitively expensive for most people …

Challenges in large FPGA-based logic emulation systems

WNN Hung, R Sun - Proceedings of the 2018 International Symposium …, 2018 - dl.acm.org
Functional verification is an important aspect of electronic design automation. Traditionally,
simulation at the register transfer-level has been the mainstream functional verification …

Cycle-accurate multi-FPGA platform for accelerated emulation of large on-chip networks

AY Romanov, A Lerner, AA Amerikanov - The Journal of Supercomputing, 2024 - Springer
On-chip networks (NoCs) have become a popular choice for designing large multiprocessor
architectures. Software-based emulation is often used to perform the design verification …

[HTML][HTML] Revisiting the high-performance reconfigurable computing for future datacenters

Q Ijaz, EB Bourennane, AK Bashir, H Asghar - Future Internet, 2020 - mdpi.com
Modern datacenters are reinforcing the computational power and energy efficiency by
assimilating field programmable gate arrays (FPGAs). The sustainability of this large-scale …

Emulation and verification framework for MPSoC based on NoC and RISC-V

M Khamis, S El-Ashry, M AbdElsalam… - Design Automation for …, 2022 - Springer
Nowadays, embedded systems have multiprocessing capabilities to meet the complexity of
modern applications, such as signal processing and multimedia. However, as the …

Time-division multiplexing based system-level FPGA routing for logic verification

P Zou, Z Lin, X Shi, Y Wu, J Chen, J Yu… - 2020 57th ACM/IEEE …, 2020 - ieeexplore.ieee.org
Multi-FPGA prototy** is widely used for modern VLSI verification, but the limited number of
inter-FPGA connections in a multi-FPGA system may cause routing failures. As a result, the …

Task map** and mesh topology exploration for an FPGA-based network on chip

K Pang, V Fresse, S Yao, OA De Lima Jr - Microprocessors and …, 2015 - Elsevier
Task map** strategies on NoC (Network-on-Chip) have a huge impact on the timing
performance and power consumption. So does the topology. In this paper, we describe the …

On a consistency testing model and strategy for revealing RISC processor's dark instructions and vulnerabilities

Y Wang, P Liu, W Wang, X Wang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
One major security vulnerability of a microprocessor can be attributed to its underlying
instruction set architecture (ISA). Generally, it is required that no secret instructions be …