Effect of gate engineering in double-gate MOSFETs for analog/RF applications

A Sarkar, AK Das, S De, CK Sarkar - Microelectronics Journal, 2012 - Elsevier
This work uncovers the potential benefit of fully-depleted short-channel triple-material
double-gate (TM-DG) SOI MOSFET in the context of RF and analog performance …

A junctionless nanowire transistor with a dual-material gate

H Lou, L Zhang, Y Zhu, X Lin, S Yang… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed in this paper.
Its characteristic is demonstrated and compared with a generic single-material-gate JNT …

An investigation of linearity performance and intermodulation distortion of GME CGT MOSFET for RFIC design

P Ghosh, S Haldar, RS Gupta… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
In this paper, an extensive study on the intermodulation distortion and the linearity of gate-
material-engineered cylindrical-gate MOSFET (GME CGT MOSFET) has been done, and the …

Drain work function engineered do**-less charge plasma TFET for ambipolar suppression and RF performance improvement: a proposal, design, and investigation

BR Raad, D Sharma, P Kondekar… - … on Electron Devices, 2016 - ieeexplore.ieee.org
A novel device configuration is presented for do**-less charge plasma tunnel FET (TFET)
for suppression of ambipolar nature with improved high-frequency figures of merit. For this …

Current-voltage analytical model and multiobjective optimization of design of a short channel gate-all-around-junctionless MOSFET

F Pezzimenti, H Bencherif, A Yousfi, L Dehimi - Solid-State Electronics, 2019 - Elsevier
In this paper we investigate the optimized design of a short channel gate-all-around-
junctionless (GAAJ) metal-oxidesemiconductor field-effect-transistor (MOSFET), including …

Analytical modeling of a dual-material graded-channel cylindrical gate-all-around FET to minimize the short-channel effects

PK Mudidhe, BR Nistala - Journal of Computational Electronics, 2023 - Springer
In this paper, an analytical model for center potential and threshold voltage is developed for
a dual-material graded-channel cylindrical gate-all-around (DMGC CGAA) FET by …

Subthreshold performance of in 1–x Ga x as based dual metal with gate stack cylindrical/surrounding gate nanowire MOSFET for low power analog applications

SK Sharma, B Raj, M Khosla - Journal of Nanoelectronics and …, 2017 - ingentaconnect.com
In this paper, In 1–x Ga x As based Dual Metal with Gate Stack Cylindrical/Surrounding Gate
Nanowire MOSFET (DMGS CG/SG NWFET) has been proposed for the first time to achieve …

Silicon complementary metal–oxide–semiconductor field-effect transistors with dual work function gate

KY Na, YS Kim - Japanese journal of applied physics, 2006 - iopscience.iop.org
This paper discusses silicon complementary metal–oxide–semiconductor (CMOS) field-
effect transistors with dual work function gates (DWFG) to improve transconductance (gm) …

An accurate model for threshold voltage analysis of dual material double gate metal oxide semiconductor field effect transistor

H Chakrabarti, R Maity, S Baishya, NP Maity - Silicon, 2021 - Springer
In this article, an accurate representation of threshold voltage for double metal double gate
(DMDG) device structure has been initiated. It is the lowest gate-source electromotive force …

A novel approach to improve the performance of charge plasma tunnel field-effect transistor

S Tirkey, D Sharma, BR Raad… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
A distinct approach is presented for realizing charge plasma tunnel field-effect transistor (CP
TFET) wherein p+ substrate is taken as silicon film and then metal electrodes with specific …