Downfall: Exploiting speculative data gathering
D Moghimi - 32nd USENIX Security Symposium (USENIX Security …, 2023 - usenix.org
We introduce Downfall attacks, new transient execution attacks that undermine the security
of computers running everywhere across the internet. We exploit the gather instruction on …
of computers running everywhere across the internet. We exploit the gather instruction on …
{NVLeak}:{Off-Chip}{Side-Channel} Attacks via {Non-Volatile} Memory Systems
We study microarchitectural side-channel attacks and defenses on non-volatile RAM
(NVRAM) DIMMs. In this study, we first perform reverse-engineering of NVRAMs as …
(NVRAM) DIMMs. In this study, we first perform reverse-engineering of NVRAMs as …
Ileakage: Browser-based timerless speculative execution attacks on apple devices
Over the past few years, the high-end CPU market is undergoing a transformational change.
Moving away from using x86 as the sole architecture for high performance devices, we have …
Moving away from using x86 as the sole architecture for high performance devices, we have …
{BunnyHop}: Exploiting the Instruction Prefetcher
BunnyHop: Exploiting the Instruction Prefetcher Page 1 This paper is included in the
Proceedings of the 32nd USENIX Security Symposium. August 9–11, 2023 • Anaheim, CA …
Proceedings of the 32nd USENIX Security Symposium. August 9–11, 2023 • Anaheim, CA …
AfterImage: Leaking control flow data and tracking load operations via the hardware prefetcher
Research into processor-based side-channels has seen both a large number and a large
variety of disclosed vulnerabilities that can leak critical, private data to malicious attackers …
variety of disclosed vulnerabilities that can leak critical, private data to malicious attackers …
BUSted!!! Microarchitectural Side-Channel Attacks on the MCU Bus Interconnect
Spectre and Meltdown have pushed the research community toward an otherwise-
unavailable understanding of the security implications of processors' microarchitecture …
unavailable understanding of the security implications of processors' microarchitecture …
Sharpen: Soc security verification by hardware penetration test
As modern SoC architectures incorporate many complex/heterogeneous intellectual
properties (IPs), the protection of security assets has become imperative, and the number of …
properties (IPs), the protection of security assets has become imperative, and the number of …
Preservation of speculative constant-time by compilation
Compilers often weaken or even discard software-based countermeasures commonly used
to protect programs against side-channel attacks; worse, they may also introduce …
to protect programs against side-channel attacks; worse, they may also introduce …
[PDF][PDF] “These results must be false”: A usability evaluation of constant-time analysis tools
Cryptography secures our online interactions, transactions, and trust. To achieve this goal,
not only do the cryptographic primitives and protocols need to be secure in theory, they also …
not only do the cryptographic primitives and protocols need to be secure in theory, they also …
Conjunct: Learning inductive invariants to prove unbounded instruction safety against microarchitectural timing attacks
The past decade has seen a deluge of microarchitectural side channels stemming from a
variety of hardware structures (the cache, branch predictor, execution ports, the TLB …
variety of hardware structures (the cache, branch predictor, execution ports, the TLB …