Programmable packet scheduling at line rate
Switches today provide a small menu of scheduling algorithms. While we can tweak
scheduling parameters, we cannot modify algorithmic logic, or add a completely new …
scheduling parameters, we cannot modify algorithmic logic, or add a completely new …
Packet-size aware scheduling algorithms in guard band for time sensitive networking
As an emerging and promising technology, Time Sensitive Networking (TSN) can be widely
used in many real-time systems such as Industrial Internet of Things (IIoT) and Cyber …
used in many real-time systems such as Industrial Internet of Things (IIoT) and Cyber …
Urgency-based scheduler for time-sensitive switched ethernet networks
J Specht, S Samii - 2016 28th Euromicro Conference on Real …, 2016 - ieeexplore.ieee.org
Due to increasing bandwidth requirements, Ethernet technology is emerging in embedded
systems application areas such as automotive, avionics, and industrial control. In the …
systems application areas such as automotive, avionics, and industrial control. In the …
Universal packet scheduling
In this paper we address a seemingly simple question: Is there a universal packet
scheduling algorithm? More precisely, we analyze (both theoretically and empirically) …
scheduling algorithm? More precisely, we analyze (both theoretically and empirically) …
Eiffel: Efficient and flexible software packet scheduling
Packet scheduling determines the ordering of packets in a queuing data structure with
respect to some ranking function that is mandated by a scheduling policy. It is the core …
respect to some ranking function that is mandated by a scheduling policy. It is the core …
Sifter: An {Inversion-Free} and {Large-Capacity} Programmable Packet Scheduler
Packet schedulers play a crucial role in determining the order in which packets are served.
They achieve this by assigning a rank to each packet and sorting them based on these …
They achieve this by assigning a rank to each packet and sorting them based on these …
BMW Tree: Large-scale, High-throughput and Modular PIFO Implementation using Balanced Multi-Way Sorting Tree
Push-In-First-Out (PIFO) queue has been extensively studied as a programmable scheduler.
To achieve accurate, large-scale, and high-throughput PIFO implementation, we propose …
To achieve accurate, large-scale, and high-throughput PIFO implementation, we propose …
Towards programmable packet scheduling
Packet scheduling in switches is not programmable; operators only choose among a handful
of scheduling algorithms implemented by the manufacturer. In contrast, other switch …
of scheduling algorithms implemented by the manufacturer. In contrast, other switch …
Effective management of DRAM bandwidth in multicore processors
Technology trends are leading to increasing number of cores on chip. All these cores
inherently share the DRAM bandwidth. The on-chip cache resources are limited and in …
inherently share the DRAM bandwidth. The on-chip cache resources are limited and in …
Measuring and understanding extreme-scale application resilience: A field study of 5,000,000 HPC application runs
This paper presents an in-depth characterization of the resiliency of more than 5 million HPC
application runs completed during the first 518 production days of Blue Waters, a 13.1 …
application runs completed during the first 518 production days of Blue Waters, a 13.1 …