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Border traps and bias-temperature instabilities in MOS devices
An overview of the effects of border traps on device performance and reliability is presented
for Si, Ge, SiGe, InGaAs, SiC, GaN, and carbon-based MOS devices that are subjected to …
for Si, Ge, SiGe, InGaAs, SiC, GaN, and carbon-based MOS devices that are subjected to …
Suitability of high-k gate oxides for III–V devices: A PBTI study in In0.53Ga0.47As devices with Al2O3
We present a comprehensive study of Positive Bias Temperature Instability (PBTI) in In 0.53
Ga 0.47 As devices with Al 2 O 3 gate oxide, and with varying thickness of the channel …
Ga 0.47 As devices with Al 2 O 3 gate oxide, and with varying thickness of the channel …
III-V/Ge MOS device technologies for low power integrated systems
CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the
promising devices for high performance and low power integrated systems in the future …
promising devices for high performance and low power integrated systems in the future …
Low-frequency noise and random telegraph noise on near-ballistic III-V MOSFETs
In this paper, we report the observation of random telegraph noise (RTN) in highly scaled
InGaAs gate-all-around (GAA) MOSFETs fabricated by a top-down approach. RTN and low …
InGaAs gate-all-around (GAA) MOSFETs fabricated by a top-down approach. RTN and low …
Impact of intrinsic channel scaling on InGaAs quantum-well MOSFETs
J Lin, DA Antoniadis… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Using a novel gate-last process scheme that affords precise channel thickness control, we
have fabricated self-aligned InGaAs quantum-well (QW) MOSFETs. Devices with a channel …
have fabricated self-aligned InGaAs quantum-well (QW) MOSFETs. Devices with a channel …
An Investigation on Border Traps in III–V MOSFETs With an In0.53Ga0.47As Channel
Continuing CMOS performance scaling requires develo** MOSFETs of high-mobility
semiconductors and InGaAs is a strong candidate for n-channel. InGaAs MOSFETs …
semiconductors and InGaAs is a strong candidate for n-channel. InGaAs MOSFETs …
Impact of starting measurement voltage relative to flat-band voltage position on the capacitance-voltage hysteresis and on the defect characterization of InGaAs/high-k …
In this work, we discuss how the position of the flat band voltage with respect to the starting
voltage of the CV measurement sweep can influence the estimation of the hysteresis in high …
voltage of the CV measurement sweep can influence the estimation of the hysteresis in high …
Impact of H2 High-Pressure Annealing Onto InGaAs Quantum-Well Metal–Oxide–Semiconductor Field-Effect Transistors With Al2O3/HfO2 Gate-Stack
We report on the impact of H 2 high-pressure annealing (HPA) onto In 0.7 Ga 0.3 As
MOSCAPs and quantum-well (QW) MOSFETs with Al 2 O 3/HfO 2 gate-stack. After HPA with …
MOSCAPs and quantum-well (QW) MOSFETs with Al 2 O 3/HfO 2 gate-stack. After HPA with …
Gate bias and geometry dependence of total-ionizing-dose effects in InGaAs quantum-well MOSFETs
The effects of total-ionizing-dose irradiation are investigated in HfO 2/InGaAs quantum-well
MOSFETs. Radiation-induced hole trap** is higher for irradiation under positive gate bias …
MOSFETs. Radiation-induced hole trap** is higher for irradiation under positive gate bias …
On the distribution of oxide defect levels in Al2O3 and HfO2 high-k dielectrics deposited on InGaAs metal-oxide-semiconductor devices studied by capacitance …
In this work, we study oxide defects in various III-V/high-k metal-oxide-semiconductor (MOS)
stacks. We show that the choice of a given starting measurement voltage with respect to the …
stacks. We show that the choice of a given starting measurement voltage with respect to the …