Compact models of transistors act as the link between semiconductor technology and circuit
design via circuit simulations. Unfortunately, compact model development and calibration is …

Transistor scaling steadily approaches fundamental limits. Sustaining circuit reliability
becomes an overwhelming challenge for foundries and their manufacturing processes …

The separation of computing units and memory in the computer architecture mandates
energy-intensive data transfers creating the von Neumann bottleneck. This bottleneck is …

Gate-all-around (GAA) nanosheet (NS) field-effect transistors (FETs) are the most promising
candidates to replace FinFETs and nanowire (NW) FETs in future technology nodes owing …

Process variations and device aging impose profound challenges for circuit designers.
Without a precise understanding of the impact of variations on the delay of circuit paths …

With the constant increase in power dissipation of nanoscale transistors, the almost four-
decade-old cycle of performance advancement in complementary metal–oxide …

This article introduces a probabilistic machine learning framework for the uncertainty
quantification (UQ) of electronic circuits based on the Gaussian process regression (GPR) …

Negative capacitance field effect transistors (NCFETs) have attracted good attention for
energy efficient circuit designs. However, there are no clear design insights with NCFET …

Machine learning (ML)-driven standard cell library characterization enables rapid, on-the-fly
generation of cell libraries, opening the door for extensive design-space exploration and …

Stationary random‐access memory (SRAM) undergoes an expansion stage, to repel
advanced process variation and support ultra‐low power operation. Memories occupy more …