Thermal modeling, analysis, and management in VLSI circuits: Principles and methods
The growing packing density and power consumption of very large scale integration (VLSI)
circuits have made thermal effects one of the most important concerns of VLSI designers …
circuits have made thermal effects one of the most important concerns of VLSI designers …
Repeater scaling and its impact on CAD
P Saxena, N Menezes, P Cocchini… - IEEE Transactions on …, 2004 - ieeexplore.ieee.org
We study scaling in the context of typical block-level wiring distributions, and identify its
impact on the design process. In particular, we study the implications of exponentially …
impact on the design process. In particular, we study the implications of exponentially …
Testing 3D chips containing through-silicon vias
EJ Marinissen, Y Zorian - 2009 International Test Conference, 2009 - ieeexplore.ieee.org
Today's miniaturization and performance requirements result in the usage of high-density
integration and packaging technologies, such as 3D stacked ICs (3D-SICs) based on …
integration and packaging technologies, such as 3D stacked ICs (3D-SICs) based on …
Methods and systems for computer aided design of 3D integrated circuits
LG McIlrath - US Patent 8,032,857, 2011 - Google Patents
Methods and systems for generating and verifying circuit layouts from computer-aided
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
3-D technology assessment: Path-finding the technology/design sweet-spot
P Marchal, B Bougard, G Katti, M Stucchi… - Proceedings of the …, 2009 - ieeexplore.ieee.org
It is widely acknowledged that three-dimensional (3-D) technologies offer numerous
opportunities for system design. In recent years, significant progress has been made on …
opportunities for system design. In recent years, significant progress has been made on …
Exploring potential benefits of 3D FPGA integration
A new timing-driven partitioning-based placement tool for 3D FPGA integration is presented.
The circuit is first divided into layers with limited number of inter-layer vias, and then …
The circuit is first divided into layers with limited number of inter-layer vias, and then …
Methods and systems for computer aided design of 3D integrated circuits
LG McIlrath - US Patent 7,526,739, 2009 - Google Patents
First worldwide family litigation filed litigation Critical https://patents. darts-ip. com/? family=
37683973&utm_source= google_patent&utm_medium= platform_link&utm_campaign …
37683973&utm_source= google_patent&utm_medium= platform_link&utm_campaign …
Methods and systems for computer aided design of 3D integrated circuits
LG McIlrath - US Patent 8,266,560, 2012 - Google Patents
Methods and systems for generating and verifying circuit layouts from computer-aided
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
Methods and systems for computer aided design of 3D integrated circuits
LG McIlrath - US Patent 8,650,516, 2014 - Google Patents
Methods and systems for generating and verifying circuit layouts from computer-aided
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In …
Methods and systems for computer aided design of 3D integrated circuits
LG McIlrath - US Patent 8,209,649, 2012 - Google Patents
Methods and systems for generating and verifying circuit layouts from computer-aided
design tools for vertically inte grated, three-dimensional integrated circuits are disclosed. In …
design tools for vertically inte grated, three-dimensional integrated circuits are disclosed. In …