T-CREST: Time-predictable multi-core architecture for embedded systems

M Schoeberl, S Abbaspour, B Akesson… - Journal of Systems …, 2015 - Elsevier
Real-time systems need time-predictable platforms to allow static analysis of the worst-case
execution time (WCET). Standard multi-core processors are optimized for the average case …

Anonymity trilemma: Strong anonymity, low bandwidth overhead, low latency-choose two

D Das, S Meiser, E Mohammadi… - 2018 IEEE Symposium …, 2018 - ieeexplore.ieee.org
This work investigates the fundamental constraints of anonymous communication (AC)
protocols. We analyze the relationship between bandwidth overhead, latency overhead, and …

Denial-of-service attacks on shared cache in multicore: Analysis and prevention

M Bechtel, H Yun - 2019 IEEE Real-Time and Embedded …, 2019 - ieeexplore.ieee.org
In this paper we investigate the feasibility of denial-of-service (DoS) attacks on shared
caches in multicore platforms. With carefully engineered attacker tasks, we are able to cause …

The shift to multicores in real-time and safety-critical systems

S Saidi, R Ernst, S Uhrig, H Theiling… - 2015 International …, 2015 - ieeexplore.ieee.org
In real-time and safety-critical systems, the move towards multicores is becoming
unavoidable in order to keep pace with the increasing required processing power and to …

[PDF][PDF] NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications.

K Goossens, M Koedam, A Nelson, S Sinha… - 2017 - akesson.nl
In this chapter we define what a mixed-time-criticality system is and what its requirements
are. After defining the concepts that such systems should follow, we described CompSOC …

Timely error detection for effective recovery in light-lockstep automotive systems

C Hernandez, J Abella - IEEE Transactions on Computer-Aided …, 2015 - ieeexplore.ieee.org
Safety-relevant systems in the automotive domain often implement features such as lockstep
execution for error detection, and reset and re-execution for error correction. Light-lockstep …

Deterministic memory abstraction and supporting multicore system architecture

F Farshchi, PK Valsan, R Mancuso, H Yun - arxiv preprint arxiv …, 2017 - arxiv.org
Poor time predictability of multicore processors has been a long-standing challenge in the
real-time systems community. In this paper, we make a case that a fundamental problem that …

Dataflow formalisation of real-time streaming applications on a composable and predictable multi-processor SOC

A Nelson, K Goossens, B Akesson - Journal of Systems Architecture, 2015 - Elsevier
Embedded systems often contain multiple applications, some of which have real-time
requirements and whose performance must be guaranteed. To efficiently execute …

Virtual timing isolation for mixed-criticality systems

J Freitag, S Uhrig, T Ungerer - 30th Euromicro Conference on …, 2018 - drops.dagstuhl.de
Commercial of the shelf multicore processors suffer from timing interferences between cores
which complicates applying them in hard real-time systems like avionic applications. This …

A complete toolchain for an interference-free deployment of avionic applications on multi-core systems

S Girbal, DG Pérez, J Le Rhun… - 2015 IEEE/AIAA 34th …, 2015 - ieeexplore.ieee.org
A complete toolchain for an interference-free deployment of avionic applications on multi-core
systems Page 1 A COMPLETE TOOL CHAIN FOR AN INTERFERENCE-FREE DEPLOYMENT …