PDRAM: A hybrid PRAM and DRAM main memory system

G Dhiman, R Ayoub, T Rosing - Proceedings of the 46th Annual Design …, 2009 - dl.acm.org
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based
on phase change random access memory (PRAM) and DRAM. The paper explores the …

[PDF][PDF] {FlashVM}: Virtual Memory Management on Flash

M Saxena, MM Swift - … Annual Technical Conference (USENIX ATC 10), 2010 - usenix.org
With the decreasing price of flash memory, systems will increasingly use solid-state storage
for virtual-memory paging rather than disks. FlashVM is a system architecture and a core …

Architectures and optimization methods of flash memory based storage systems

Y Deng, J Zhou - Journal of Systems Architecture, 2011 - Elsevier
Flash memory is a non-volatile memory which can be electrically erased and
reprogrammed. Its major advantages such as small physical size, no mechanical …

[PDF][PDF] High-performance and low-power rewritable SiOx 1 kbit one diode-one resistor crossbar memory array

G Wang, AC Lauchner, J Lin, D Natelson, KV Palem… - Adv. Mater, 2013 - academia.edu
Dynamic random access memories (DRAMs) and flash memories experience performance
degradation and high manufacturing costs in nano-size scaling; harbingers of physical …

Software wear management for persistent memories

V Gogte, W Wang, S Diestelhorst, A Kolli… - … USENIX Conference on …, 2019 - usenix.org
The commercial release of byte-addressable persistent memories (PMs) is imminent.
Unfortunately, these devices suffer from limited write endurance—without any wear …

Forensics and anti-forensics of a NAND flash memory: From a copy-back program perspective

NY Ahn, DH Lee - IEEE Access, 2021 - ieeexplore.ieee.org
This paper proposes a safe copy-back program operation in a NAND flash memory, which is
targeting digital forensics for a variety of reasons. Due to the background management …

Maximizing I/O throughput and minimizing performance variation via reinforcement learning based I/O merging for SSDs

C Wu, C Ji, Q Li, C Gao, R Pan, C Fu… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Merging technique is widely adopted by I/O schedulers to maximize system I/O throughput.
However, I/O merging could increase the latency of individual I/O, thus incurring prolonged …

The impact of solid state drive on search engine cache management

J Wang, E Lo, ML Yiu, J Tong, G Wang… - Proceedings of the 36th …, 2013 - dl.acm.org
Caching is an important optimization in search engine architectures. Existing caching
techniques for search engine optimization are mostly biased towards the reduction of …

An efficient file-aware garbage collection algorithm for NAND flash-based consumer electronics

H Yan, Q Yao - IEEE Transactions on Consumer Electronics, 2014 - ieeexplore.ieee.org
The use of NAND flash memory is increasing in consumer electronics. Because an out-of-
place update scheme is used to address the erase-before-write hardware constraint in …

Efficient and intelligent garbage collection policy for NAND flash-based consumer electronics

M Lin, S Chen - IEEE Transactions on Consumer Electronics, 2013 - ieeexplore.ieee.org
Because NAND flash memory provides the out-of-place update scheme to address its erase-
before-write hardware constraint, garbage collection policy is included in the flash-aware file …