A survey on processing-in-memory techniques: Advances and challenges

K Asifuzzaman, NR Miniskar, AR Young, F Liu… - … , Devices, Circuits and …, 2023 - Elsevier
Abstract Processing-in-memory (PIM) techniques have gained much attention from computer
architecture researchers, and significant research effort has been invested in exploring and …

A modern primer on processing in memory

O Mutlu, S Ghose, J Gómez-Luna… - … computing: from devices …, 2022 - Springer
Modern computing systems are overwhelmingly designed to move data to computation. This
design choice goes directly against at least three key trends in computing that cause …

Benchmarking a new paradigm: Experimental analysis and characterization of a real processing-in-memory system

J Gómez-Luna, I El Hajj, I Fernandez… - IEEE …, 2022 - ieeexplore.ieee.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …

Benchmarking a new paradigm: An experimental analysis of a real processing-in-memory architecture

J Gómez-Luna, IE Hajj, I Fernandez… - arxiv preprint arxiv …, 2021 - arxiv.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …

Fundamentally understanding and solving rowhammer

O Mutlu, A Olgun, AG Yağlıkcı - Proceedings of the 28th Asia and South …, 2023 - dl.acm.org
We provide an overview of recent developments and future directions in the RowHammer
vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which …

HiRA: Hidden row activation for reducing refresh latency of off-the-shelf DRAM chips

AG Yağlikçi, A Olgun, M Patel, H Luo… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
DRAM is the building block of modern main memory systems. DRAM cells must be
periodically refreshed to prevent data loss. Refresh operations degrade system performance …

Towards efficient sparse matrix vector multiplication on real processing-in-memory architectures

C Giannoula, I Fernandez, J Gómez-Luna… - ACM SIGMETRICS …, 2022 - dl.acm.org
Several manufacturers have already started to commercialize near-bank Processing-In-
Memory (PIM) architectures, after decades of research efforts. Near-bank PIM architectures …

DRAM bender: An extensible and versatile FPGA-based infrastructure to easily test state-of-the-art DRAM chips

A Olgun, H Hassan, AG Yağlıkçı… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
To understand and improve DRAM performance, reliability, security, and energy efficiency,
prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art …

Casper: Accelerating stencil computations using near-cache processing

A Denzler, GF Oliveira, N Ha**azar, R Bera… - IEEE …, 2023 - ieeexplore.ieee.org
Stencil computations are commonly used in a wide variety of scientific applications, ranging
from large-scale weather prediction to solving partial differential equations. Stencil …

Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis

İE Yüksel, YC Tuğrul, A Olgun… - … Symposium on High …, 2024 - ieeexplore.ieee.org
Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog
operational properties of DRAM circuitry to enable massively parallel in-DRAM computation …