An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter
An 800-MHz low-power direct digital frequency synthesizer (DDFS) with an on-chip digital-to-
analog (D/A) converter is presented. The DDFS consists of a phase accumulator, two phase …
analog (D/A) converter is presented. The DDFS consists of a phase accumulator, two phase …
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation
This paper presents new techniques to implement direct digital frequency synthesizers
(DDFSs) with optimized piecewise-polynomial approximation. DDFS performances with …
(DDFSs) with optimized piecewise-polynomial approximation. DDFS performances with …
Low-power hybrid 1-bit full-adder circuit for energy efficient arithmetic applications
A novel “16 transistor”(16T) 1-bit Full adder (FA) circuit based on CMOS transmission-gate
(TG) and pass transistor logics (PTL) is presented. This 1-bit FA circuit with TG and PTL …
(TG) and pass transistor logics (PTL) is presented. This 1-bit FA circuit with TG and PTL …
Phase to sinusoid amplitude conversion techniques for direct digital frequency synthesis
JMP Langlois, D Al-Khalili - IEE Proceedings-Circuits, Devices and Systems, 2004 - IET
The authors present a review of phase to sine amplitude conversion (PSAC) techniques for
direct digital frequency synthesis (DDFS). Principles of DDFS are first considered, then …
direct digital frequency synthesis (DDFS). Principles of DDFS are first considered, then …
A pipelined ROM-less architecture for sine-output direct digital frequency synthesizers using the second-order parabolic approximation
AM Sodagar, GR Lahiji - … on Circuits and Systems II: Analog …, 2001 - ieeexplore.ieee.org
A mathematical approximation for the sine function is proposed which is so close to the sine
function that it satisfies the accuracy requirements for sine computation in a typical sine …
function that it satisfies the accuracy requirements for sine computation in a typical sine …
Direct digital frequency synthesizers with polynomial hyperfolding technique
A new approach to design the phase to sine mapper of a direct digital frequency synthesizer
(DDFS) is presented. The proposed technique uses an optimized polynomial expansion of …
(DDFS) is presented. The proposed technique uses an optimized polynomial expansion of …
A 100-MHz 8-mW ROM-less quadrature direct digital frequency synthesizer
A low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise
linear approximation is used to avoid using a ROM look-up table to store the sine values as …
linear approximation is used to avoid using a ROM look-up table to store the sine values as …
A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 m SiGe BiCMOS Technology
X Yu, FF Dai, JD Irwin… - IEEE Journal of Solid-State …, 2008 - ieeexplore.ieee.org
This paper presents a 12 GHz direct digital synthesizer (DDS) MMIC with 9-bit phase and 8-
bit amplitude resolution implemented in a 0.18 mum SiGe BiCMOS technology. Composed …
bit amplitude resolution implemented in a 0.18 mum SiGe BiCMOS technology. Composed …
A 12-bit nonlinear DAC for direct digital frequency synthesis
Z Zhou, GS La Rue - … Transactions on Circuits and Systems I …, 2008 - ieeexplore.ieee.org
A 12-bit nonlinear digital-to-analog converter (DAC) was fabricated in a 0.35-mum SOI
CMOS process. The nonlinear DAC can implement a piecewise-linear approximation to a …
CMOS process. The nonlinear DAC can implement a piecewise-linear approximation to a …
A direct digital frequency synthesizer based on a new form of polynomial approximations
YH Chen, YA Chau - IEEE Transactions on Consumer …, 2010 - ieeexplore.ieee.org
A new form of polynomial approximations of the discrete sinusoid waveform is proposed for
the design of a direct digital frequency synthesizer (DDFS). With the polynomial …
the design of a direct digital frequency synthesizer (DDFS). With the polynomial …