Analytical model of dielectric modulated trench double gate junctionless FET for biosensing applications

S Kumar, B Singh, Y Singh - IEEE Sensors Journal, 2021 - ieeexplore.ieee.org
A 2-D analytical model of a dielectric modulated trench double gate junctionless FET (DM-
TDGJLFET) is developed for label-free detection of biomolecules. The channel potential is …

Analytical modeling and numerical simulation of graded JAM Split Gate-All-Around (GJAM-SGAA) Bio-FET for label free Avian Influenza antibody and DNA detection

S Yadav, S Rewari - Microelectronics Journal, 2023 - Elsevier
This manuscript presents the analytical model of a novel biosensor called Graded JAM Split
Gate-All-Around (GJAM-SGAA) Bio-FET for the detection of Avian Influenza antibody and …

Study of analog performance of common source amplifier using rectangular core–shell based double gate junctionless transistor

V Narula, M Agarwal - Semiconductor Science and Technology, 2020 - iopscience.iop.org
A new state of the art double gate junctionless transistor (DGJLT) namely the rectangular
core–shell DGJLT (RCS-DGJLT) based common source amplifier circuit is designed to …

Subthreshold modeling of tri-gate junctionless transistors with variable channel edges and substrate bias effects

D Gola, B Singh, PK Tiwari - IEEE Transactions on Electron …, 2018 - ieeexplore.ieee.org
In this paper, subthreshold channel potential, current, swing, threshold voltage, and drain-
induced barrier lowering models of short-channel tri-gate junctionless field-effect transistors …

Dual-metal double-gate with low-k/high-k oxide stack junctionless MOSFET for a wide range of protein detection: a fully electrostatic based numerical approach

A Chattopadhyay, S Tewari, PS Gupta - Silicon, 2021 - Springer
We investigate the performance of a dielectric modulated dual-metal double-gate with low-
k/high-k oxide stack junctionless MOSFET (DM-DG-LK/HK-S JL-MOSFET) based sensor …

Analytical model of double gate stacked oxide junctionless transistor considering source/drain depletion effects for CMOS low power applications

S Manikandan, NB Balamurugan, D Nirmal - Silicon, 2020 - Springer
This paper proposes a 2-D analytical model developed for Double Gate Junctionless
Transistor with a SiO 2/HfO 2 stacked oxide structure. The model is solved by Poisson's …

Modeling short-channel effects in asymmetric junctionless MOSFETs with underlap

N Jaiswal, A Kranti - IEEE Transactions on Electron Devices, 2018 - ieeexplore.ieee.org
This paper proposes a semianalytical model to estimate short-channel effects for
independent gate operation in double-gate (DG) junctionless (JL) MOSFET incorporating …

A model for gate-underlap-dependent short-channel effects in junctionless MOSFET

N Jaiswal, A Kranti - IEEE Transactions on Electron Devices, 2018 - ieeexplore.ieee.org
In this paper, we investigate the impact of gate-source/drain underlap on short-channel
behavior of junctionless (JL) transistor through a quasi-analytical model and 2-D numerical …

Subthreshold Characteristic Analysis and Models for Tri-Gate SOI MOSFETs Using Substrate Bias Induced Effects

D Gola, B Singh, PK Tiwari - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
This paper proposes the substrate bias voltage dependent subthreshold models of channel
potential, threshold voltage, current, drain induced barrier lowering, and subthreshold swing …

Dual-channel junctionless FETs for improved analog/RF performance

A Garg, Y Singh, B Singh - Silicon, 2021 - Springer
A dual-channel single gate junctionless FET (DCJLT) is investigated to improve the
analog/RF performance. The gate of proposed structure is placed in a vertical trench and …