Printed thin-film transistors: research from China

S Tong, J Sun, J Yang - ACS applied materials & interfaces, 2018 - ACS Publications
Thin-film transistors (TFTs) have experienced tremendous development during the past
decades and show great promising applications in flat displays, sensors, radio frequency …

Design and implementation of hybrid DC-DC converter: A review

TS Chang, H Ramiah, Y Jiang, CC Lim, NS Lai… - IEEE …, 2023 - ieeexplore.ieee.org
The advancement in Power Management Integrated Circuit (PMIC) has driven the dc-dc
conversion technology into a System-on-Chip (SoC) solutions, leveraging CMOS technology …

Insight into gate-induced drain leakage in silicon nanowire transistors

J Fan, M Li, X Xu, Y Yang, H Xuan… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
In this paper, detailed physical mechanisms of gate-induced drain leakage (GIDL) in gate-all-
around silicon nanowire transistors (SNWTs) are investigated and verified by experiments …

Design of ternary logic combinational circuits based on quantum dot gate FETs

S Karmakar, JA Chandy, FC Jain - IEEE Transactions on Very …, 2012 - ieeexplore.ieee.org
In this paper, we discuss logic circuit designs using the circuit model of three-state quantum
dot gate field effect transistors (QDGFETs). QDGFETs produce one intermediate state …

[PDF][PDF] Gate stack high-κ materials for Si-based MOSFETs past, present, and futures

S Mohsenifar, M Shahrokhabadi - terminology, 2015 - researchgate.net
An extensive discussion on the High-κ Metal Gate (HKMG) Stack for Si-based MOSFETs has
been reviewed in this paper. The implementation of High-κ oxides is a develo** strategy …

An overview of conventional and new advancements in high kappa thin film deposition techniques in metal oxide semiconductor devices

P Devaray, SFWM Hatta, YH Wong - Journal of Materials Science …, 2022 - Springer
In the last three decades, study has seen the evolution of metal oxide semiconductor (MOS)
devices as device geometries have shrunk in line with Moore's law. This device shrunk …

Demonstration of complementary ternary graphene field-effect transistors

YJ Kim, SY Kim, J Noh, CH Shim, U Jung, SK Lee… - Scientific reports, 2016 - nature.com
Strong demand for power reduction in state-of-the-art semiconductor devices calls for novel
devices and architectures. Since ternary logic architecture can perform the same function as …

Semiconductor device having localized extremely thin silicon on insulator channel region

A Majumdar, RJ Miller, M Ramachandran - US Patent 8,685,847, 2014 - Google Patents
BACKGROUND The present invention relates generally to semiconductor device
manufacturing and, more particularly, to a semicon ductor device having a localized …

Improvement of carrier ballisticity in junctionless nanowire transistors

N Dehdashti Akhavan, I Ferain, P Razavi, R Yu… - Applied Physics …, 2011 - pubs.aip.org
In this work we show that junctionless nanowire transistor (JNT) exhibits lower degree of
ballisticity in subthreshold and higher ballisticity above threshold compare to conventional …

Analytical computation of electrical parameters in GAAQWT and CNTFET with identical configuration using NEGF method

A Deyasi, A Sarkar - International Journal of Electronics, 2018 - Taylor & Francis
ABSTRACT A two-dimensional quantum mechanical model is presented for calculating
carrier transport in ultra-thin gate-all-around quantum wire transistor (GAAQWT) and carbon …