The evaluation of competing cloud deployment options (CDOs) forms a major challenge
when migrating software systems to cloud environments. For example, there exists a …

High-level synthesis (HLS), which refers to the automatic compilation of software into
hardware, is rapidly gaining popularity. In a world increasingly reliant on application-specific …

Field-programmable gate arrays (FPGAs) have become popular means of hardware
acceleration since they offer massive parallelism, flexible configurability, and potentially …

High-level synthesis (HLS) can greatly facilitate the description of complex hardware
implementations, by raising the level of abstraction up to a classical imperative language …

An equivalence checking method of finite state machines with datapath based on value
propagation over model paths is presented here for validation of code motion …

A formal method for checking equivalence between a given behavioral specification prior to
scheduling and the one produced by the scheduler is described. Finite state machine with …

High-level synthesis (HLS) is the automatic compilation of software programs into custom
hardware designs. With programmable hardware devices (such as FPGAs) now …

The growing design-productivity gap has made designers shift toward using high-level
languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is …

The growing complexity of systems and their implementation into silicon encourages
designers to look for ways to model designs at higher levels of abstraction and then …

By increasing the complexity of system on chip (SoC) designs formal equivalence
verification and debugging have become more and more important. Lower level methods …