Now a days, high-k dielectrics have been investigated as an alternative to Silicon dioxide
(SiO 2) based gate dielectric for nanoscale semiconductor devices. This paper is an attempt …

The design of CMOS circuits using nanoscale MOSFET has become very difficult nowadays
as device modeling faces new challenges such as short channel effects and mobility …

The do**less tunnel field-effect transistors (DLTFETs) are captivating researchers over
conventional TFETs as the former eliminates fabrication-related challenges such as random …

Tunnel field-effect transistors (TFETs) have shown attractive device performance making
them a potential candidate to replace MOSFETs in future technologies. However, the …

In this paper, we propose a double gate junctionless FET (DGJLFET) with an extended back
gate (EBG) architecture for significantly improved performance in the sub-10-nm regime …

This paper reports on the design optimization of double gate (DG) tunnel FET (TFET) for
dynamic memory applications in sub-100-nm regime. It is shown that incorporation of lateral …

This book presents the material necessary for understanding the physics, operation, design,
and performance of modern MOSFETs with nanometer dimensions. It offers a brief …

The Wigner function formalism has been introduced with an emphasis on basic theoretical
aspects, and recently developed numerical approaches and applications for modeling and …

The dual-material double-gate (DMDG) silicon-on-insulator (SOI) metal-oxide-
semiconductor field-effect transistor (MOSFET) is the leading contender for sub-100-nm …

This article depicts the drain current for a graded channel double metal double gate
(GCDMDG) device in a unique way. This work offers a thorough examination of the drain …