With the down-scaling of CMOS technology, the design complexity of very large-scale
integrated is increasing. Although the application of machine learning (ML) techniques in …

The paper describes the recent state of the art in hierarchical analog synthesis, with a strong
emphasis on associated techniques for computer-aided model generation and optimization …

An overview is presented of the significant influences of Moore's Law scaling on radiation
effects on microelectronics, focusing on historical trends and future needs. A number of …

Over the past ten years, as integrated circuits became increasingly more complex and
expensive, the industry began to embrace new design and reuse methodologies that are …

Together with the increase in electronic circuit complexity, the design and optimization
processes have to be automated with high accuracy. Predicting and improving the design …

This paper presents an overview of methods to automatically generate posynomial response
surface models for the performance characteristics of analog integrated circuits based on …

The design and optimization of a high-speed low-voltage CMOS flash analog-to-digital
converter (ADC) are presented. The optimization procedures used during the design give …

This book represents a compendium of fundamental problem formulations of analog design
centering and sizing. It provides a differentiated knowledge about the tasks of analog design …

Fast and accurate performance estimation methods are essential to automated synthesis of
analog circuits. Development of analog performance models is difficult due to the highly …

Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the
way to higher operating speeds and smaller feature sizes. This book presents a systematic …